From: Anson Huang Date: Fri, 17 Apr 2020 05:39:05 +0000 (+0800) Subject: arm64: dts: imx8qxp-mek: Sort labels alphabetically X-Git-Tag: v5.15~3695^2~4^2~14 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=bc3895b29de373432e1ed019cc8c9504affc5736;p=platform%2Fkernel%2Flinux-starfive.git arm64: dts: imx8qxp-mek: Sort labels alphabetically Sort the labels alphabetically for consistency. Signed-off-by: Anson Huang Signed-off-by: Shawn Guo --- diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index 13460a3..2ed7aba 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -30,29 +30,8 @@ }; }; -&adma_lpuart0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpuart0>; - status = "okay"; -}; - -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_fec1>; - phy-mode = "rgmii-id"; - phy-handle = <ðphy0>; - fsl,magic-packet; +&adma_dsp { status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - }; - }; }; &adma_i2c1 { @@ -131,6 +110,35 @@ }; }; +&adma_lpuart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart0>; + status = "okay"; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + fsl,magic-packet; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + }; +}; + +&scu_key { + status = "okay"; +}; + &usdhc1 { assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>; assigned-clock-rates = <200000000>; @@ -229,11 +237,3 @@ >; }; }; - -&adma_dsp { - status = "okay"; -}; - -&scu_key { - status = "okay"; -};