From: Ian Abbott Date: Tue, 8 Oct 2013 18:06:33 +0000 (+0100) Subject: staging: comedi: s626: move encoder functions part 3 X-Git-Tag: v3.13-rc1~170^2~351 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=bc284a2aa5f255597e1c23e4d6daa9aa274fc290;p=kernel%2Fkernel-generic.git staging: comedi: s626: move encoder functions part 3 Move the final lot of encoder functions to help avoid the forward declaration of `s626_enc_chan_info[]`. Signed-off-by: Ian Abbott Reviewed-by: H Hartley Sweeten Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/comedi/drivers/s626.c b/drivers/staging/comedi/drivers/s626.c index 1af0536..05c856c 100644 --- a/drivers/staging/comedi/drivers/s626.c +++ b/drivers/staging/comedi/drivers/s626.c @@ -1032,6 +1032,173 @@ static uint16_t get_load_trig_b(struct comedi_device *dev, return (debi_read(dev, k->my_crb) >> CRBBIT_LOADSRC_B) & 3; } +/* + * Return/set counter interrupt source and clear any captured + * index/overflow events. int_source: 0=Disabled, 1=OverflowOnly, + * 2=IndexOnly, 3=IndexAndOverflow. + */ +static void set_int_src_a(struct comedi_device *dev, + const struct s626_enc_info *k, uint16_t int_source) +{ + struct s626_private *devpriv = dev->private; + + /* Reset any pending counter overflow or index captures. */ + debi_replace(dev, k->my_crb, ~CRBMSK_INTCTRL, + CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A); + + /* Program counter interrupt source. */ + debi_replace(dev, k->my_cra, ~CRAMSK_INTSRC_A, + int_source << CRABIT_INTSRC_A); + + /* Update MISC2 interrupt enable mask. */ + devpriv->counter_int_enabs = + (devpriv->counter_int_enabs & ~k->my_event_bits[3]) | + k->my_event_bits[int_source]; +} + +static void set_int_src_b(struct comedi_device *dev, + const struct s626_enc_info *k, uint16_t int_source) +{ + struct s626_private *devpriv = dev->private; + uint16_t crb; + + /* Cache writeable CRB register image. */ + crb = debi_read(dev, k->my_crb) & ~CRBMSK_INTCTRL; + + /* Reset any pending counter overflow or index captures. */ + debi_write(dev, k->my_crb, + (uint16_t)(crb | CRBMSK_INTRESETCMD | CRBMSK_INTRESET_B)); + + /* Program counter interrupt source. */ + debi_write(dev, k->my_crb, + (uint16_t)((crb & ~CRBMSK_INTSRC_B) | + (int_source << CRBBIT_INTSRC_B))); + + /* Update MISC2 interrupt enable mask. */ + devpriv->counter_int_enabs = + (devpriv->counter_int_enabs & ~k->my_event_bits[3]) | + k->my_event_bits[int_source]; +} + +static uint16_t get_int_src_a(struct comedi_device *dev, + const struct s626_enc_info *k) +{ + return (debi_read(dev, k->my_cra) >> CRABIT_INTSRC_A) & 3; +} + +static uint16_t get_int_src_b(struct comedi_device *dev, + const struct s626_enc_info *k) +{ + return (debi_read(dev, k->my_crb) >> CRBBIT_INTSRC_B) & 3; +} + +#ifdef unused +/* + * Return/set the clock multiplier. + */ +static void set_clk_mult(struct comedi_device *dev, + const struct s626_enc_info *k, uint16_t value) +{ + k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKMULT) | + (value << STDBIT_CLKMULT)), FALSE); +} + +static uint16_t get_clk_mult(struct comedi_device *dev, + const struct s626_enc_info *k) +{ + return (k->get_mode(dev, k) >> STDBIT_CLKMULT) & 3; +} + +/* + * Return/set the clock polarity. + */ +static void set_clk_pol(struct comedi_device *dev, + const struct s626_enc_info *k, uint16_t value) +{ + k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKPOL) | + (value << STDBIT_CLKPOL)), FALSE); +} + +static uint16_t get_clk_pol(struct comedi_device *dev, + const struct s626_enc_info *k) +{ + return (k->get_mode(dev, k) >> STDBIT_CLKPOL) & 1; +} + +/* + * Return/set the clock source. + */ +static void set_clk_src(struct comedi_device *dev, + const struct s626_enc_info *k, uint16_t value) +{ + k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKSRC) | + (value << STDBIT_CLKSRC)), FALSE); +} + +static uint16_t get_clk_src(struct comedi_device *dev, + const struct s626_enc_info *k) +{ + return (k->get_mode(dev, k) >> STDBIT_CLKSRC) & 3; +} + +/* + * Return/set the index polarity. + */ +static void set_index_pol(struct comedi_device *dev, + const struct s626_enc_info *k, uint16_t value) +{ + k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_INDXPOL) | + ((value != 0) << STDBIT_INDXPOL)), FALSE); +} + +static uint16_t get_index_pol(struct comedi_device *dev, + const struct s626_enc_info *k) +{ + return (k->get_mode(dev, k) >> STDBIT_INDXPOL) & 1; +} + +/* + * Return/set the index source. + */ +static void set_index_src(struct comedi_device *dev, + const struct s626_enc_info *k, uint16_t value) +{ + k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_INDXSRC) | + ((value != 0) << STDBIT_INDXSRC)), FALSE); +} + +static uint16_t get_index_src(struct comedi_device *dev, + const struct s626_enc_info *k) +{ + return (k->get_mode(dev, k) >> STDBIT_INDXSRC) & 1; +} +#endif + +/* + * Generate an index pulse. + */ +static void pulse_index_a(struct comedi_device *dev, + const struct s626_enc_info *k) +{ + uint16_t cra; + + cra = debi_read(dev, k->my_cra); + /* Pulse index. */ + debi_write(dev, k->my_cra, (cra ^ CRAMSK_INDXPOL_A)); + debi_write(dev, k->my_cra, cra); +} + +static void pulse_index_b(struct comedi_device *dev, + const struct s626_enc_info *k) +{ + uint16_t crb; + + crb = debi_read(dev, k->my_crb) & ~CRBMSK_INTCTRL; + /* Pulse index. */ + debi_write(dev, k->my_crb, (crb ^ CRBMSK_INDXPOL_B)); + debi_write(dev, k->my_crb, crb); +} + static unsigned int s626_ai_reg_to_uint(int data) { unsigned int tempdata; @@ -2203,173 +2370,6 @@ static void close_dma_b(struct comedi_device *dev, struct buffer_dma *pdma, } } -/* - * Return/set counter interrupt source and clear any captured - * index/overflow events. int_source: 0=Disabled, 1=OverflowOnly, - * 2=IndexOnly, 3=IndexAndOverflow. - */ -static void set_int_src_a(struct comedi_device *dev, - const struct s626_enc_info *k, uint16_t int_source) -{ - struct s626_private *devpriv = dev->private; - - /* Reset any pending counter overflow or index captures. */ - debi_replace(dev, k->my_crb, ~CRBMSK_INTCTRL, - CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A); - - /* Program counter interrupt source. */ - debi_replace(dev, k->my_cra, ~CRAMSK_INTSRC_A, - int_source << CRABIT_INTSRC_A); - - /* Update MISC2 interrupt enable mask. */ - devpriv->counter_int_enabs = - (devpriv->counter_int_enabs & ~k->my_event_bits[3]) | - k->my_event_bits[int_source]; -} - -static void set_int_src_b(struct comedi_device *dev, - const struct s626_enc_info *k, uint16_t int_source) -{ - struct s626_private *devpriv = dev->private; - uint16_t crb; - - /* Cache writeable CRB register image. */ - crb = debi_read(dev, k->my_crb) & ~CRBMSK_INTCTRL; - - /* Reset any pending counter overflow or index captures. */ - debi_write(dev, k->my_crb, - (uint16_t)(crb | CRBMSK_INTRESETCMD | CRBMSK_INTRESET_B)); - - /* Program counter interrupt source. */ - debi_write(dev, k->my_crb, - (uint16_t)((crb & ~CRBMSK_INTSRC_B) | - (int_source << CRBBIT_INTSRC_B))); - - /* Update MISC2 interrupt enable mask. */ - devpriv->counter_int_enabs = - (devpriv->counter_int_enabs & ~k->my_event_bits[3]) | - k->my_event_bits[int_source]; -} - -static uint16_t get_int_src_a(struct comedi_device *dev, - const struct s626_enc_info *k) -{ - return (debi_read(dev, k->my_cra) >> CRABIT_INTSRC_A) & 3; -} - -static uint16_t get_int_src_b(struct comedi_device *dev, - const struct s626_enc_info *k) -{ - return (debi_read(dev, k->my_crb) >> CRBBIT_INTSRC_B) & 3; -} - -#ifdef unused -/* - * Return/set the clock multiplier. - */ -static void set_clk_mult(struct comedi_device *dev, - const struct s626_enc_info *k, uint16_t value) -{ - k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKMULT) | - (value << STDBIT_CLKMULT)), FALSE); -} - -static uint16_t get_clk_mult(struct comedi_device *dev, - const struct s626_enc_info *k) -{ - return (k->get_mode(dev, k) >> STDBIT_CLKMULT) & 3; -} - -/* - * Return/set the clock polarity. - */ -static void set_clk_pol(struct comedi_device *dev, - const struct s626_enc_info *k, uint16_t value) -{ - k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKPOL) | - (value << STDBIT_CLKPOL)), FALSE); -} - -static uint16_t get_clk_pol(struct comedi_device *dev, - const struct s626_enc_info *k) -{ - return (k->get_mode(dev, k) >> STDBIT_CLKPOL) & 1; -} - -/* - * Return/set the clock source. - */ -static void set_clk_src(struct comedi_device *dev, - const struct s626_enc_info *k, uint16_t value) -{ - k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_CLKSRC) | - (value << STDBIT_CLKSRC)), FALSE); -} - -static uint16_t get_clk_src(struct comedi_device *dev, - const struct s626_enc_info *k) -{ - return (k->get_mode(dev, k) >> STDBIT_CLKSRC) & 3; -} - -/* - * Return/set the index polarity. - */ -static void set_index_pol(struct comedi_device *dev, - const struct s626_enc_info *k, uint16_t value) -{ - k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_INDXPOL) | - ((value != 0) << STDBIT_INDXPOL)), FALSE); -} - -static uint16_t get_index_pol(struct comedi_device *dev, - const struct s626_enc_info *k) -{ - return (k->get_mode(dev, k) >> STDBIT_INDXPOL) & 1; -} - -/* - * Return/set the index source. - */ -static void set_index_src(struct comedi_device *dev, - const struct s626_enc_info *k, uint16_t value) -{ - k->set_mode(dev, k, ((k->get_mode(dev, k) & ~STDMSK_INDXSRC) | - ((value != 0) << STDBIT_INDXSRC)), FALSE); -} - -static uint16_t get_index_src(struct comedi_device *dev, - const struct s626_enc_info *k) -{ - return (k->get_mode(dev, k) >> STDBIT_INDXSRC) & 1; -} -#endif - -/* - * Generate an index pulse. - */ -static void pulse_index_a(struct comedi_device *dev, - const struct s626_enc_info *k) -{ - uint16_t cra; - - cra = debi_read(dev, k->my_cra); - /* Pulse index. */ - debi_write(dev, k->my_cra, (cra ^ CRAMSK_INDXPOL_A)); - debi_write(dev, k->my_cra, cra); -} - -static void pulse_index_b(struct comedi_device *dev, - const struct s626_enc_info *k) -{ - uint16_t crb; - - crb = debi_read(dev, k->my_crb) & ~CRBMSK_INTCTRL; - /* Pulse index. */ - debi_write(dev, k->my_crb, (crb ^ CRBMSK_INDXPOL_B)); - debi_write(dev, k->my_crb, crb); -} - static const struct s626_enc_info s626_enc_chan_info[] = { { .get_enable = get_enable_a,