From: Mark Brown <broonie@kernel.org>
Date: Mon, 9 Sep 2019 13:55:20 +0000 (+0100)
Subject: Merge branch 'asoc-5.4' into asoc-next
X-Git-Tag: v5.4-rc1~52^2~9^2^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=bb831786117519fc16dfd3eaa7b84e4f6bbb8d99;p=platform%2Fkernel%2Flinux-rpi.git

Merge branch 'asoc-5.4' into asoc-next
---

bb831786117519fc16dfd3eaa7b84e4f6bbb8d99
diff --cc sound/soc/atmel/mchp-i2s-mcc.c
index ab7d5f9,9a40614..befc2a3
--- a/sound/soc/atmel/mchp-i2s-mcc.c
+++ b/sound/soc/atmel/mchp-i2s-mcc.c
@@@ -656,27 -652,30 +652,35 @@@ static int mchp_i2s_mcc_hw_params(struc
  		return 0;
  	}
  
- 	/* Save the number of channels to know what interrupts to enable */
- 	dev->channels = channels;
- 
- 	if (set_divs) {
- 		bclk_rate = frame_length * params_rate(params);
- 		ret = mchp_i2s_mcc_config_divs(dev, bclk_rate, &mra);
+ 	if (mra & MCHP_I2SMCC_MRA_SRCCLK_GCLK && !dev->gclk_use) {
+ 		/* set the rate */
+ 		ret = clk_set_rate(dev->gclk, rate);
  		if (ret) {
- 			dev_err(dev->dev, "unable to configure the divisors: %d\n",
- 				ret);
+ 			dev_err(dev->dev,
+ 				"unable to set rate %lu to GCLK: %d\n",
+ 				rate, ret);
  			return ret;
  		}
+ 
+ 		ret = clk_prepare(dev->gclk);
+ 		if (ret < 0) {
+ 			dev_err(dev->dev, "unable to prepare GCLK: %d\n", ret);
+ 			return ret;
+ 		}
+ 		dev->gclk_use = 1;
  	}
  
+ 	/* Save the number of channels to know what interrupts to enable */
+ 	dev->channels = channels;
+ 
  	ret = regmap_write(dev->regmap, MCHP_I2SMCC_MRA, mra);
 -	if (ret < 0)
 +	if (ret < 0) {
 +		if (dev->gclk_use) {
 +			clk_unprepare(dev->gclk);
 +			dev->gclk_use = 0;
 +		}
  		return ret;
 +	}
  	return regmap_write(dev->regmap, MCHP_I2SMCC_MRB, mrb);
  }