From: Simon Glass <sjg@chromium.org>
Date: Thu, 6 Feb 2020 16:54:57 +0000 (-0700)
Subject: dm: irq: Add support for interrupt controller types
X-Git-Tag: v2020.10~370^2~8
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ba876079714db52887cab9f068ea1136de4cc107;p=platform%2Fkernel%2Fu-boot.git

dm: irq: Add support for interrupt controller types

There can be different types of interrupt controllers in a system and some
drivers may need to distinguish between these. In general this can be
handled using the device tree by adding the interrupt information to
device nodes.

However on x86 devices we have interrupt controllers which are not tied
to any particular device and not really used in U-Boot. These still need
to be inited, so a convenient method is to give each controller a type
and allow a particular controller type to be probed.

Add support for this in sandbox along with a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove the new bland line at EOF of test/dm/irq.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
index 2421922c9e..7775794eaa 100644
--- a/arch/sandbox/include/asm/test.h
+++ b/arch/sandbox/include/asm/test.h
@@ -45,6 +45,10 @@
 #define PCI_EA_BAR2_MAGIC		0x72727272
 #define PCI_EA_BAR4_MAGIC		0x74747474
 
+enum {
+	SANDBOX_IRQN_PEND = 1,	/* Interrupt number for 'pending' test */
+};
+
 /* System controller driver data */
 enum {
 	SYSCON0		= 32,
diff --git a/drivers/misc/irq-uclass.c b/drivers/misc/irq-uclass.c
index d5182cf149..c52c813ff3 100644
--- a/drivers/misc/irq-uclass.c
+++ b/drivers/misc/irq-uclass.c
@@ -1,11 +1,13 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ * Copyright 2019 Google, LLC
+ * Written by Simon Glass <sjg@chromium.org>
  */
 
 #include <common.h>
 #include <dm.h>
 #include <irq.h>
+#include <dm/device-internal.h>
 
 int irq_route_pmc_gpio_gpe(struct udevice *dev, uint pmc_gpe_num)
 {
@@ -47,6 +49,17 @@ int irq_restore_polarities(struct udevice *dev)
 	return ops->restore_polarities(dev);
 }
 
+int irq_first_device_type(enum irq_dev_t type, struct udevice **devp)
+{
+	int ret;
+
+	ret = uclass_first_device_drvdata(UCLASS_IRQ, type, devp);
+	if (ret)
+		return log_msg_ret("find", ret);
+
+	return 0;
+}
+
 UCLASS_DRIVER(irq) = {
 	.id		= UCLASS_IRQ,
 	.name		= "irq",
diff --git a/drivers/misc/irq_sandbox.c b/drivers/misc/irq_sandbox.c
index 6dda1a4c44..011022ac62 100644
--- a/drivers/misc/irq_sandbox.c
+++ b/drivers/misc/irq_sandbox.c
@@ -43,7 +43,7 @@ static const struct irq_ops sandbox_irq_ops = {
 };
 
 static const struct udevice_id sandbox_irq_ids[] = {
-	{ .compatible = "sandbox,irq"},
+	{ .compatible = "sandbox,irq", SANDBOX_IRQT_BASE },
 	{ }
 };
 
diff --git a/include/irq.h b/include/irq.h
index 01ded64f16..8b4e2ecfc0 100644
--- a/include/irq.h
+++ b/include/irq.h
@@ -8,6 +8,17 @@
 #ifndef __irq_H
 #define __irq_H
 
+/*
+ * Interrupt controller types available. You can find a particular one with
+ * irq_first_device_type()
+ */
+enum irq_dev_t {
+	X86_IRQT_BASE,		/* Base controller */
+	X86_IRQT_ITSS,		/* ITSS controller, e.g. on APL */
+	X86_IRQT_ACPI_GPE,	/* ACPI General-Purpose Events controller */
+	SANDBOX_IRQT_BASE,	/* Sandbox testing */
+};
+
 /**
  * struct irq_ops - Operations for the IRQ
  */
@@ -85,4 +96,16 @@ int irq_snapshot_polarities(struct udevice *dev);
  */
 int irq_restore_polarities(struct udevice *dev);
 
+/**
+ * irq_first_device_type() - Get a particular interrupt controller
+ *
+ * On success this returns an activated interrupt device.
+ *
+ * @type: Type to find
+ * @devp: Returns the device, if found
+ * @return 0 if OK, -ENODEV if not found, other -ve error if uclass failed to
+ *	probe
+ */
+int irq_first_device_type(enum irq_dev_t type, struct udevice **devp);
+
 #endif
diff --git a/test/dm/irq.c b/test/dm/irq.c
index 726189c59f..adbcffbe9c 100644
--- a/test/dm/irq.c
+++ b/test/dm/irq.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <irq.h>
+#include <asm/test.h>
 #include <dm/test.h>
 #include <test/ut.h>
 
@@ -30,3 +31,15 @@ static int dm_test_irq_base(struct unit_test_state *uts)
 	return 0;
 }
 DM_TEST(dm_test_irq_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test of irq_first_device_type() */
+static int dm_test_irq_type(struct unit_test_state *uts)
+{
+	struct udevice *dev;
+
+	ut_assertok(irq_first_device_type(SANDBOX_IRQT_BASE, &dev));
+	ut_asserteq(-ENODEV, irq_first_device_type(X86_IRQT_BASE, &dev));
+
+	return 0;
+}
+DM_TEST(dm_test_irq_type, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);