From: Jun Zhang <jun@junz.org>
Date: Tue, 16 May 2023 11:11:34 +0000 (+0800)
Subject: Add baseline tests for PR62238
X-Git-Tag: upstream/17.0.6~8380
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ba3dbcc779af271d3dce022af684ecfe7d3e2d78;p=platform%2Fupstream%2Fllvm.git

Add baseline tests for PR62238

Differential Revision: https://reviews.llvm.org/D150377

Signed-off-by: Jun Zhang <jun@junz.org>
---

diff --git a/llvm/test/Transforms/InstSimplify/select.ll b/llvm/test/Transforms/InstSimplify/select.ll
index 8fb136f..29c568d 100644
--- a/llvm/test/Transforms/InstSimplify/select.ll
+++ b/llvm/test/Transforms/InstSimplify/select.ll
@@ -1438,3 +1438,69 @@ latch:
 exit:
   ret ptr %sel
 }
+
+define i8 @select_sub_cmp(i8 %0, i8 %1) {
+; CHECK-LABEL: @select_sub_cmp(
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp eq i8 [[TMP1:%.*]], [[TMP0:%.*]]
+; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw i8 [[TMP1]], [[TMP0]]
+; CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[TMP3]], i8 0, i8 [[TMP4]]
+; CHECK-NEXT:    ret i8 [[TMP5]]
+;
+  %3 = icmp eq i8 %1, %0
+  %4 = sub nsw i8 %1, %0
+  %5 = select i1 %3, i8 0, i8 %4
+  ret i8 %5
+}
+
+define <2 x i8> @select_sub_cmp_vec(<2 x i8> %0, <2 x i8> %1) {
+; CHECK-LABEL: @select_sub_cmp_vec(
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp eq <2 x i8> [[TMP1:%.*]], [[TMP0:%.*]]
+; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw <2 x i8> [[TMP1]], [[TMP0]]
+; CHECK-NEXT:    [[TMP5:%.*]] = select <2 x i1> [[TMP3]], <2 x i8> zeroinitializer, <2 x i8> [[TMP4]]
+; CHECK-NEXT:    ret <2 x i8> [[TMP5]]
+;
+  %3 = icmp eq <2 x i8> %1, %0
+  %4 = sub nsw <2 x i8> %1, %0
+  %5 = select <2 x i1> %3, <2 x i8> <i8 0, i8 0>, <2 x i8> %4
+  ret <2 x i8> %5
+}
+
+define i8 @select_sub_cmp_swap(i8 %0, i8 %1) {
+; CHECK-LABEL: @select_sub_cmp_swap(
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp eq i8 [[TMP1:%.*]], [[TMP0:%.*]]
+; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw i8 [[TMP0]], [[TMP1]]
+; CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[TMP3]], i8 0, i8 [[TMP4]]
+; CHECK-NEXT:    ret i8 [[TMP5]]
+;
+  %3 = icmp eq i8 %1, %0
+  %4 = sub nsw i8 %0, %1
+  %5 = select i1 %3, i8 0, i8 %4
+  ret i8 %5
+}
+
+define <2 x i8> @select_sub_cmp_vec_swap(<2 x i8> %0, <2 x i8> %1) {
+; CHECK-LABEL: @select_sub_cmp_vec_swap(
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp eq <2 x i8> [[TMP1:%.*]], [[TMP0:%.*]]
+; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw <2 x i8> [[TMP0]], [[TMP1]]
+; CHECK-NEXT:    [[TMP5:%.*]] = select <2 x i1> [[TMP3]], <2 x i8> zeroinitializer, <2 x i8> [[TMP4]]
+; CHECK-NEXT:    ret <2 x i8> [[TMP5]]
+;
+  %3 = icmp eq <2 x i8> %1, %0
+  %4 = sub nsw <2 x i8> %0, %1
+  %5 = select <2 x i1> %3, <2 x i8> <i8 0, i8 0>, <2 x i8> %4
+  ret <2 x i8> %5
+}
+
+; negative test
+define i8 @select_sub_cmp_nonzero(i8 %0, i8 %1) {
+; CHECK-LABEL: @select_sub_cmp_nonzero(
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp eq i8 [[TMP1:%.*]], [[TMP0:%.*]]
+; CHECK-NEXT:    [[TMP4:%.*]] = sub nsw i8 [[TMP1]], [[TMP0]]
+; CHECK-NEXT:    [[TMP5:%.*]] = select i1 [[TMP3]], i8 42, i8 [[TMP4]]
+; CHECK-NEXT:    ret i8 [[TMP5]]
+;
+  %3 = icmp eq i8 %1, %0
+  %4 = sub nsw i8 %1, %0
+  %5 = select i1 %3, i8 42, i8 %4
+  ret i8 %5
+}