From: Alan Modra <amodra@gmail.com>
Date: Wed, 30 Aug 2017 11:05:09 +0000 (+0930)
Subject: PowerPC64 __tls_get_addr sequence optimization
X-Git-Tag: users/ARM/embedded-binutils-master-2017q4~1284
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b9f04fe0dfe64bc6224e7bb96378607f17da7446;p=external%2Fbinutils.git

PowerPC64 __tls_get_addr sequence optimization

There isn't a good reason for ld.bfd to behave differently from gold
in the code generated by TLS GD/LD to LE optimization.

bfd/
	* elf64-ppc.c (ppc64_elf_relocate_section): When optimizing
	__tls_get_addr call sequences to LE, don't move the addi down
	to the nop.  Replace the bl with addi and leave the nop alone.
ld/
	* testsuite/ld-powerpc/tls.d: Update.
	* testsuite/ld-powerpc/tlsexe.d: Update.
	* testsuite/ld-powerpc/tlsexetoc.d: Update.
	* testsuite/ld-powerpc/tlsld.d: Update.
	* testsuite/ld-powerpc/tlsmark.d: Update.
	* testsuite/ld-powerpc/tlsopt4.d: Update.
	* testsuite/ld-powerpc/tlstoc.d: Update.
---

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 1d54f03..ec74d9d 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,9 @@
+2017-08-30  Alan Modra  <amodra@gmail.com>
+
+	* elf64-ppc.c (ppc64_elf_relocate_section): When optimizing
+	__tls_get_addr call sequences to LE, don't move the addi down
+	to the nop.  Replace the bl with addi and leave the nop alone.
+
 2017-08-29  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* elf32-i386.c (elf_i386_pie_finish_undefweak_symbol):
diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c
index 7245038..5b96a04 100644
--- a/bfd/elf64-ppc.c
+++ b/bfd/elf64-ppc.c
@@ -13916,7 +13916,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	case R_PPC64_GOT_TLSLD16_LO:
 	  if (tls_mask != 0 && (tls_mask & TLS_LD) == 0)
 	    {
-	      unsigned int insn1, insn2, insn3;
+	      unsigned int insn1, insn2;
 	      bfd_vma offset;
 
 	    tls_ldgd_opt:
@@ -13995,18 +13995,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	      bfd_put_32 (input_bfd, insn1,
 			  contents + rel->r_offset - d_offset);
 	      if (offset != (bfd_vma) -1)
-		{
-		  insn3 = bfd_get_32 (input_bfd,
-				      contents + offset + 4);
-		  if (insn3 == NOP
-		      || insn3 == CROR_151515 || insn3 == CROR_313131)
-		    {
-		      rel[1].r_offset += 4;
-		      bfd_put_32 (input_bfd, insn2, contents + offset + 4);
-		      insn2 = NOP;
-		    }
-		  bfd_put_32 (input_bfd, insn2, contents + offset);
-		}
+		bfd_put_32 (input_bfd, insn2, contents + offset);
 	      if ((tls_mask & tls_gd) == 0
 		  && (tls_gd == 0 || toc_symndx != 0))
 		{
@@ -14020,7 +14009,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	case R_PPC64_TLSGD:
 	  if (tls_mask != 0 && (tls_mask & TLS_GD) == 0)
 	    {
-	      unsigned int insn2, insn3;
+	      unsigned int insn2;
 	      bfd_vma offset = rel->r_offset;
 
 	      if ((tls_mask & TLS_TPRELGD) != 0)
@@ -14045,15 +14034,6 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	      /* Zap the reloc on the _tls_get_addr call too.  */
 	      BFD_ASSERT (offset == rel[1].r_offset);
 	      rel[1].r_info = ELF64_R_INFO (STN_UNDEF, R_PPC64_NONE);
-	      insn3 = bfd_get_32 (input_bfd,
-				  contents + offset + 4);
-	      if (insn3 == NOP
-		  || insn3 == CROR_151515 || insn3 == CROR_313131)
-		{
-		  rel->r_offset += 4;
-		  bfd_put_32 (input_bfd, insn2, contents + offset + 4);
-		  insn2 = NOP;
-		}
 	      bfd_put_32 (input_bfd, insn2, contents + offset);
 	      if ((tls_mask & TLS_TPRELGD) == 0 && toc_symndx != 0)
 		goto again;
@@ -14063,7 +14043,7 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	case R_PPC64_TLSLD:
 	  if (tls_mask != 0 && (tls_mask & TLS_LD) == 0)
 	    {
-	      unsigned int insn2, insn3;
+	      unsigned int insn2;
 	      bfd_vma offset = rel->r_offset;
 
 	      if (toc_symndx)
@@ -14088,15 +14068,6 @@ ppc64_elf_relocate_section (bfd *output_bfd,
 	      BFD_ASSERT (offset == rel[1].r_offset);
 	      rel[1].r_info = ELF64_R_INFO (STN_UNDEF, R_PPC64_NONE);
 	      insn2 = 0x38630000;	/* addi 3,3,0 */
-	      insn3 = bfd_get_32 (input_bfd,
-				  contents + offset + 4);
-	      if (insn3 == NOP
-		  || insn3 == CROR_151515 || insn3 == CROR_313131)
-		{
-		  rel->r_offset += 4;
-		  bfd_put_32 (input_bfd, insn2, contents + offset + 4);
-		  insn2 = NOP;
-		}
 	      bfd_put_32 (input_bfd, insn2, contents + offset);
 	      goto again;
 	    }
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 725ce6c..f1f7a7c 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,13 @@
+2017-08-30  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-powerpc/tls.d: Update.
+	* testsuite/ld-powerpc/tlsexe.d: Update.
+	* testsuite/ld-powerpc/tlsexetoc.d: Update.
+	* testsuite/ld-powerpc/tlsld.d: Update.
+	* testsuite/ld-powerpc/tlsmark.d: Update.
+	* testsuite/ld-powerpc/tlsopt4.d: Update.
+	* testsuite/ld-powerpc/tlstoc.d: Update.
+
 2017-08-30  Hans-Peter Nilsson  <hp@axis.com>
 
 	* testsuite/ld-cris/dso-pltdis1.d: Run ld with --hash-style=sysv.
diff --git a/ld/testsuite/ld-powerpc/tls.d b/ld/testsuite/ld-powerpc/tls.d
index 7082028..04b1ac8 100644
--- a/ld/testsuite/ld-powerpc/tls.d
+++ b/ld/testsuite/ld-powerpc/tls.d
@@ -11,17 +11,17 @@ Disassembly of section \.text:
 
 0+100000e8 <\._start>:
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 90 78|78 90 63 38) 	addi    r3,r3,-28552
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(60 00 00 00|00 00 00 60) 	nop
-.*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
 .*:	(60 00 00 00|00 00 00 60) 	nop
-.*:	(38 63 90 40|40 90 63 38) 	addi    r3,r3,-28608
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*:	(38 63 90 40|40 90 63 38) 	addi    r3,r3,-28608
 .*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(39 23 80 48|48 80 23 39) 	addi    r9,r3,-32696
 .*:	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*:	(81 49 80 50|50 80 49 81) 	lwz     r10,-32688\(r9\)
@@ -33,11 +33,11 @@ Disassembly of section \.text:
 .*:	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
 .*:	(99 49 90 70|70 90 49 99) 	stb     r10,-28560\(r9\)
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 90 00|00 90 63 38) 	addi    r3,r3,-28672
-.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(f9 43 80 08|08 80 43 f9) 	std     r10,-32760\(r3\)
 .*:	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*:	(91 49 80 10|10 80 49 91) 	stw     r10,-32752\(r9\)
diff --git a/ld/testsuite/ld-powerpc/tlsexe.d b/ld/testsuite/ld-powerpc/tlsexe.d
index b536622..c423bbd 100644
--- a/ld/testsuite/ld-powerpc/tlsexe.d
+++ b/ld/testsuite/ld-powerpc/tlsexe.d
@@ -30,17 +30,17 @@ Disassembly of section \.text:
 
 .* <._start>:
 .*	(e8 62 80 10|10 80 62 e8) 	ld      r3,-32752\(r2\)
-.*	(60 00 00 00|00 00 00 60) 	nop
 .*	(7c 63 6a 14|14 6a 63 7c) 	add     r3,r3,r13
+.*	(60 00 00 00|00 00 00 60) 	nop
 .*	(38 62 80 18|18 80 62 38) 	addi    r3,r2,-32744
 .*	(4b ff ff a9|a9 ff ff 4b) 	bl      .*
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(60 00 00 00|00 00 00 60) 	nop
 .*	(38 63 90 38|38 90 63 38) 	addi    r3,r3,-28616
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*	(60 00 00 00|00 00 00 60) 	nop
+.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*	(60 00 00 00|00 00 00 60) 	nop
 .*	(39 23 80 40|40 80 23 39) 	addi    r9,r3,-32704
 .*	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*	(81 49 80 48|48 80 49 81) 	lwz     r10,-32696\(r9\)
@@ -52,11 +52,11 @@ Disassembly of section \.text:
 .*	(3d 2d 00 00|00 00 2d 3d) 	addis   r9,r13,0
 .*	(99 49 90 68|68 90 49 99) 	stb     r10,-28568\(r9\)
 .*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(60 00 00 00|00 00 00 60) 	nop
 .*	(38 63 90 00|00 90 63 38) 	addi    r3,r3,-28672
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*	(60 00 00 00|00 00 00 60) 	nop
+.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*	(60 00 00 00|00 00 00 60) 	nop
 .*	(f9 43 80 08|08 80 43 f9) 	std     r10,-32760\(r3\)
 .*	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*	(91 49 80 10|10 80 49 91) 	stw     r10,-32752\(r9\)
diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d
index 1c70d54..5f2e8b4 100644
--- a/ld/testsuite/ld-powerpc/tlsexetoc.d
+++ b/ld/testsuite/ld-powerpc/tlsexetoc.d
@@ -36,11 +36,11 @@ Disassembly of section \.text:
 .*	(4b ff ff a9|a9 ff ff 4b) 	bl      .*
 .*	(60 00 00 00|00 00 00 60) 	nop
 .*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(60 00 00 00|00 00 00 60) 	nop
 .*	(38 63 90 38|38 90 63 38) 	addi    r3,r3,-28616
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*	(60 00 00 00|00 00 00 60) 	nop
+.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*	(60 00 00 00|00 00 00 60) 	nop
 .*	(39 23 80 40|40 80 23 39) 	addi    r9,r3,-32704
 .*	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*	(81 49 80 48|48 80 49 81) 	lwz     r10,-32696\(r9\)
diff --git a/ld/testsuite/ld-powerpc/tlsld.d b/ld/testsuite/ld-powerpc/tlsld.d
index d66d1db..b34c01a 100644
--- a/ld/testsuite/ld-powerpc/tlsld.d
+++ b/ld/testsuite/ld-powerpc/tlsld.d
@@ -12,15 +12,15 @@ Disassembly of section \.text:
 .*	nop
 .*	addis   r29,r13,0
 .*	mr      r3,r29
-.*	nop
 .*	addi    r3,r3,4096
+.*	nop
 .*	addis   r3,r3,0
 .*	ld      r3,-32768\(r3\)
 .*	nop
 .*	addis   r29,r13,0
 .*	mr      r3,r29
-.*	nop
 .*	addi    r3,r3,4096
+.*	nop
 .*	ld      r3,-32768\(r3\)
 .*	nop
 .*	nop
@@ -28,15 +28,15 @@ Disassembly of section \.text:
 .*	nop
 .*	addis   r29,r13,0
 .*	mr      r3,r29
-.*	nop
 .*	addi    r3,r3,-28672
+.*	nop
 .*	ld      r3,0\(r3\)
 .*	nop
 .*	nop
 .*	addis   r29,r13,0
 .*	mr      r3,r29
-.*	nop
 .*	addi    r3,r3,-28672
+.*	nop
 .*	ld      r3,0\(r3\)
 .*	nop
 .*	nop
diff --git a/ld/testsuite/ld-powerpc/tlsmark.d b/ld/testsuite/ld-powerpc/tlsmark.d
index 786a811..720a31f 100644
--- a/ld/testsuite/ld-powerpc/tlsmark.d
+++ b/ld/testsuite/ld-powerpc/tlsmark.d
@@ -11,26 +11,26 @@ Disassembly of section \.text:
 
 0+100000e8 <_start>:
 .*:	(48 00 00 18|18 00 00 48) 	b       10000100 <_start\+0x18>
-.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 90 00|00 90 63 38) 	addi    r3,r3,-28672
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(e8 83 00 00|00 00 83 e8) 	ld      r4,0\(r3\)
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(48 00 00 0c|0c 00 00 48) 	b       10000108 <_start\+0x20>
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(4b ff ff e8|e8 ff ff 4b) 	b       100000ec <_start\+0x4>
-.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(e8 83 80 00|00 80 83 e8) 	ld      r4,-32768\(r3\)
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(48 00 00 0c|0c 00 00 48) 	b       10000124 <_start\+0x3c>
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(48 00 00 14|14 00 00 48) 	b       10000134 <_start\+0x4c>
-.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 90 04|04 90 63 38) 	addi    r3,r3,-28668
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(e8 a3 00 00|00 00 a3 e8) 	ld      r5,0\(r3\)
 .*:	(4b ff ff ec|ec ff ff 4b) 	b       1000011c <_start\+0x34>
-.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(e8 a3 80 04|04 80 a3 e8) 	ld      r5,-32764\(r3\)
 
 0+10000140 <\.__tls_get_addr>:
diff --git a/ld/testsuite/ld-powerpc/tlsopt4.d b/ld/testsuite/ld-powerpc/tlsopt4.d
index 944e97f..a595fba 100644
--- a/ld/testsuite/ld-powerpc/tlsopt4.d
+++ b/ld/testsuite/ld-powerpc/tlsopt4.d
@@ -18,11 +18,11 @@ Disassembly of section \.opt1:
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(2c 24 00 00|00 00 24 2c) 	cmpdi   r4,0
 .*:	(41 82 00 10|10 00 82 41) 	beq     .*
-.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
-.*:	(48 00 00 0c|0c 00 00 48) 	b       .*
 .*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(48 00 00 0c|0c 00 00 48) 	b       .*
 .*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
+.*:	(60 00 00 00|00 00 00 60) 	nop
 
 Disassembly of section \.opt2:
 
@@ -31,8 +31,8 @@ Disassembly of section \.opt2:
 .*:	(2c 24 00 00|00 00 24 2c) 	cmpdi   r4,0
 .*:	(41 82 00 08|08 00 82 41) 	beq     .*
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
+.*:	(60 00 00 00|00 00 00 60) 	nop
 
 Disassembly of section \.opt3:
 
@@ -41,8 +41,8 @@ Disassembly of section \.opt3:
 .*:	(48 00 00 0c|0c 00 00 48) 	b       .*
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(48 00 00 10|10 00 00 48) 	b       .*
-.*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
-.*:	(48 00 00 0c|0c 00 00 48) 	b       .*
 .*:	(60 00 00 00|00 00 00 60) 	nop
+.*:	(48 00 00 0c|0c 00 00 48) 	b       .*
 .*:	(38 63 90 08|08 90 63 38) 	addi    r3,r3,-28664
+.*:	(60 00 00 00|00 00 00 60) 	nop
diff --git a/ld/testsuite/ld-powerpc/tlstoc.d b/ld/testsuite/ld-powerpc/tlstoc.d
index dccf82e..b852ddd 100644
--- a/ld/testsuite/ld-powerpc/tlstoc.d
+++ b/ld/testsuite/ld-powerpc/tlstoc.d
@@ -14,17 +14,17 @@ Disassembly of section \.text:
 
 .* <\._start>:
 .*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
-.*	(60 00 00 00|00 00 00 60) 	nop
 .*	(38 63 90 40|40 90 63 38) 	addi    r3,r3,-28608
-.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*	(60 00 00 00|00 00 00 60) 	nop
-.*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
 .*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
 .*	(60 00 00 00|00 00 00 60) 	nop
-.*	(38 63 90 48|48 90 63 38) 	addi    r3,r3,-28600
 .*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
+.*	(38 63 90 48|48 90 63 38) 	addi    r3,r3,-28600
 .*	(60 00 00 00|00 00 00 60) 	nop
+.*	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*	(38 63 10 00|00 10 63 38) 	addi    r3,r3,4096
+.*	(60 00 00 00|00 00 00 60) 	nop
 .*	(39 23 80 50|50 80 23 39) 	addi    r9,r3,-32688
 .*	(3d 23 00 00|00 00 23 3d) 	addis   r9,r3,0
 .*	(81 49 80 58|58 80 49 81) 	lwz     r10,-32680\(r9\)