From: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Date: Fri, 17 Jan 2020 07:22:48 +0000 (+0100)
Subject: aco: fix emitting slc for MUBUF instructions on GFX6-GFX7
X-Git-Tag: upstream/20.1.8~4347
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b9b393f0ce4e8df85f2e7eafeb409b032819e33d;p=platform%2Fupstream%2Fmesa.git

aco: fix emitting slc for MUBUF instructions on GFX6-GFX7

Same as GFX10, only GFX8/GFX9 moved that bit near the opcode.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3437>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3437>
---

diff --git a/src/amd/compiler/aco_assembler.cpp b/src/amd/compiler/aco_assembler.cpp
index a9dd6b4..dc341e5 100644
--- a/src/amd/compiler/aco_assembler.cpp
+++ b/src/amd/compiler/aco_assembler.cpp
@@ -321,7 +321,7 @@ void emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction*
       encoding |= 0x0FFF & mubuf->offset;
       out.push_back(encoding);
       encoding = 0;
-      if (ctx.chip_class >= GFX10) {
+      if (ctx.chip_class <= GFX7 || ctx.chip_class >= GFX10) {
          encoding |= (mubuf->slc ? 1 : 0) << 22;
       }
       encoding |= instr->operands[2].physReg() << 24;