From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Tue, 24 Sep 2013 18:26:26 +0000 (+0300)
Subject: drm/i915: Allow p1 divider 2 on VLV
X-Git-Tag: v3.13-rc1~69^2~3^2~173
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b99ab66301f384766b8e37abe52719c65a7da140;p=profile%2Fivi%2Fkernel-x86-ivi.git

drm/i915: Allow p1 divider 2 on VLV

According to VLV2_DPLL_mphy_hsdpll_frequency_table_ww6_rev1p1.xlsm p1
can be 2-3 always.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 99c56b8..c4658e7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -330,7 +330,7 @@ static const intel_limit_t intel_limits_vlv_hdmi = {
 	.m1 = { .min = 2, .max = 3 },
 	.m2 = { .min = 11, .max = 156 },
 	.p = { .min = 10, .max = 30 },
-	.p1 = { .min = 3, .max = 3 },
+	.p1 = { .min = 2, .max = 3 },
 	.p2 = { .dot_limit = 270000,
 		.p2_slow = 2, .p2_fast = 20 },
 };