From: Tomasz Figa Date: Thu, 4 Apr 2013 04:35:27 +0000 (+0900) Subject: clk: exynos4: Remove E4X12 prefix from SRC_DMC register X-Git-Tag: v3.10-rc1~63^2~4^2~43 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b950622bddc1c15f1e17041f1aec5816912ccca5;p=profile%2Fivi%2Fkernel-x86-ivi.git clk: exynos4: Remove E4X12 prefix from SRC_DMC register This register is present on all Exynos4 SoCs and so the prefix is misleading. Signed-off-by: Tomasz Figa Signed-off-by: Kyungmin Park Reviewed-by: Thomas Abraham Acked-by: Mike Turquette Signed-off-by: Kukjin Kim --- diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index b4daffa..a33b0ac 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -93,7 +93,7 @@ #define GATE_IP_PERIL 0xc950 #define E4210_GATE_IP_PERIR 0xc960 #define E4X12_MPLL_CON0 0x10108 -#define E4X12_SRC_DMC 0x10200 +#define SRC_DMC 0x10200 #define APLL_CON0 0x14100 #define E4210_MPLL_CON0 0x14108 #define SRC_CPU 0x14200 @@ -389,7 +389,7 @@ struct samsung_mux_clock exynos4x12_mux_clks[] __initdata = { MUX(none, "mout_jpeg1", sclk_evpll_p, E4X12_SRC_CAM1, 4, 1), MUX(none, "mout_jpeg", mout_jpeg_p, E4X12_SRC_CAM1, 8, 1), MUX_A(sclk_mpll, "sclk_mpll", mout_mpll_p, - E4X12_SRC_DMC, 12, 1, "sclk_mpll"), + SRC_DMC, 12, 1, "sclk_mpll"), MUX_A(sclk_vpll, "sclk_vpll", mout_vpll_p, SRC_TOP0, 8, 1, "sclk_vpll"), MUX(mout_core, "mout_core", mout_core_p4x12, SRC_CPU, 16, 1),