From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Date: Wed, 11 Jan 2023 06:04:02 +0000 (+0200)
Subject: ARM: dts: qcom: apq8084: add clocks and clock-names to gcc device
X-Git-Tag: v6.6.7~3530^2~4^2~23
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b894f2cf915479f9b25266da394942db9736161d;p=platform%2Fkernel%2Flinux-starfive.git

ARM: dts: qcom: apq8084: add clocks and clock-names to gcc device

Add clocks and clock-names nodes to the gcc device to bind clocks using
the DT links.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111060402.1168726-13-dmitry.baryshkov@linaro.org
---

diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 562995d..fabd745 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -689,6 +689,24 @@
 			#reset-cells = <1>;
 			#power-domain-cells = <1>;
 			reg = <0xfc400000 0x4000>;
+			clocks = <&xo_board>,
+				 <&sleep_clk>,
+				 <0>, /* ufs */
+				 <0>,
+				 <0>,
+				 <0>,
+				 <0>, /* sata */
+				 <0>,
+				 <0>; /* pcie */
+			clock-names = "xo",
+				      "sleep_clk",
+				      "ufs_rx_symbol_0_clk_src",
+				      "ufs_rx_symbol_1_clk_src",
+				      "ufs_tx_symbol_0_clk_src",
+				      "ufs_tx_symbol_1_clk_src",
+				      "sata_asic0_clk",
+				      "sata_rx_clk",
+				      "pcie_pipe";
 		};
 
 		tcsr_mutex: hwlock@fd484000 {