From: Paul Burton Date: Tue, 22 Sep 2015 18:12:09 +0000 (-0700) Subject: MIPS: CPS: Set Status.BEV bit during early boot X-Git-Tag: v4.4-rc1~6^2~97 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b85ff244533fb4b88f34bcca55c194f142338c3f;p=platform%2Fkernel%2Flinux-exynos.git MIPS: CPS: Set Status.BEV bit during early boot Set the Status.BEV bit throughout the early startup of a secondary core such that if an exception occurs the core branches to one of the exception vector entries from cps-vec.S, rather than branching to whatever is set in EBase. Signed-off-by: Paul Burton Cc: linux-mips@linux-mips.org Cc: Markos Chandras Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11200/ Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S index 209ded1..b3fdb2a 100644 --- a/arch/mips/kernel/cps-vec.S +++ b/arch/mips/kernel/cps-vec.S @@ -71,7 +71,7 @@ not_nmi: mtc0 t0, CP0_CAUSE /* Setup Status */ - li t0, ST0_CU1 | ST0_CU0 + li t0, ST0_CU1 | ST0_CU0 | ST0_BEV mtc0 t0, CP0_STATUS /*