From: bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Sun, 23 Apr 2006 21:33:48 +0000 (+0000)
Subject: sparc condition code computation fix (Even Rouault)
X-Git-Tag: TizenStudio_2.0_p2.3~14380
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b854608e0c10eb31d545d1fa7db2412522a315f5;p=sdk%2Femulator%2Fqemu.git

sparc condition code computation fix (Even Rouault)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1838 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/target-sparc/op.c b/target-sparc/op.c
index 67de62f..4609cdf 100644
--- a/target-sparc/op.c
+++ b/target-sparc/op.c
@@ -415,28 +415,50 @@ void OPPROTO op_addx_T1_T0(void)
 void OPPROTO op_addx_T1_T0_cc(void)
 {
     target_ulong src1;
-
     src1 = T0;
-    T0 += T1 + FLAG_SET(PSR_CARRY);
-    env->psr = 0;
+    if (FLAG_SET(PSR_CARRY))
+    {
+      T0 += T1 + 1;
+      env->psr = 0;
+#ifdef TARGET_SPARC64
+      if ((T0 & 0xffffffff) <= (src1 & 0xffffffff))
+        env->psr |= PSR_CARRY;
+      env->xcc = 0;
+      if (T0 <= src1)
+        env->xcc |= PSR_CARRY;
+#else
+      if (T0 <= src1)
+        env->psr |= PSR_CARRY;
+#endif
+    }
+    else
+    {
+      T0 += T1;
+      env->psr = 0;
+#ifdef TARGET_SPARC64
+      if ((T0 & 0xffffffff) < (src1 & 0xffffffff))
+        env->psr |= PSR_CARRY;
+      env->xcc = 0;
+      if (T0 < src1)
+        env->xcc |= PSR_CARRY;
+#else
+      if (T0 < src1)
+        env->psr |= PSR_CARRY;
+#endif
+    }
 #ifdef TARGET_SPARC64
     if (!(T0 & 0xffffffff))
 	env->psr |= PSR_ZERO;
     if ((int32_t) T0 < 0)
 	env->psr |= PSR_NEG;
-    if ((T0 & 0xffffffff) < (src1 & 0xffffffff))
-	env->psr |= PSR_CARRY;
     if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff) ^ -1) &
 	 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
 	env->psr |= PSR_OVF;
 
-    env->xcc = 0;
     if (!T0)
 	env->xcc |= PSR_ZERO;
     if ((int64_t) T0 < 0)
 	env->xcc |= PSR_NEG;
-    if (T0 < src1)
-	env->xcc |= PSR_CARRY;
     if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1ULL << 63))
 	env->xcc |= PSR_OVF;
 #else
@@ -444,8 +466,6 @@ void OPPROTO op_addx_T1_T0_cc(void)
 	env->psr |= PSR_ZERO;
     if ((int32_t) T0 < 0)
 	env->psr |= PSR_NEG;
-    if (T0 < src1)
-	env->psr |= PSR_CARRY;
     if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
 	env->psr |= PSR_OVF;
 #endif
@@ -505,28 +525,50 @@ void OPPROTO op_subx_T1_T0(void)
 void OPPROTO op_subx_T1_T0_cc(void)
 {
     target_ulong src1;
-
     src1 = T0;
-    T0 -= T1 + FLAG_SET(PSR_CARRY);
-    env->psr = 0;
+    if (FLAG_SET(PSR_CARRY))
+    {
+      T0 -= T1 + 1;
+      env->psr = 0;
+#ifdef TARGET_SPARC64
+      if ((src1 & 0xffffffff) <= (T1 & 0xffffffff))
+        env->psr |= PSR_CARRY;
+      env->xcc = 0;
+      if (src1 <= T1)
+        env->xcc |= PSR_CARRY;
+#else
+      if (src1 <= T1)
+        env->psr |= PSR_CARRY;
+#endif
+    }
+    else
+    {
+      T0 -= T1;
+      env->psr = 0;
+#ifdef TARGET_SPARC64
+      if ((src1 & 0xffffffff) < (T1 & 0xffffffff))
+        env->psr |= PSR_CARRY;
+      env->xcc = 0;
+      if (src1 < T1)
+        env->xcc |= PSR_CARRY;
+#else
+      if (src1 < T1)
+        env->psr |= PSR_CARRY;
+#endif
+    }
 #ifdef TARGET_SPARC64
     if (!(T0 & 0xffffffff))
 	env->psr |= PSR_ZERO;
     if ((int32_t) T0 < 0)
 	env->psr |= PSR_NEG;
-    if ((src1 & 0xffffffff) < (T1 & 0xffffffff))
-	env->psr |= PSR_CARRY;
     if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff)) &
 	 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
 	env->psr |= PSR_OVF;
 
-    env->xcc = 0;
     if (!T0)
 	env->xcc |= PSR_ZERO;
     if ((int64_t) T0 < 0)
 	env->xcc |= PSR_NEG;
-    if (src1 < T1)
-	env->xcc |= PSR_CARRY;
     if (((src1 ^ T1) & (src1 ^ T0)) & (1ULL << 63))
 	env->xcc |= PSR_OVF;
 #else
@@ -534,8 +576,6 @@ void OPPROTO op_subx_T1_T0_cc(void)
 	env->psr |= PSR_ZERO;
     if ((int32_t) T0 < 0)
 	env->psr |= PSR_NEG;
-    if (src1 < T1)
-	env->psr |= PSR_CARRY;
     if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))
 	env->psr |= PSR_OVF;
 #endif