From: jakub Date: Wed, 25 Apr 2012 19:40:31 +0000 (+0000) Subject: PR target/53110 X-Git-Tag: upstream/4.9.2~13049 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b828abf1a797a35c674001a31c4155cb5932f6c5;p=platform%2Fupstream%2Flinaro-gcc.git PR target/53110 * config/i386/i386.md (and3): For andq $0xffffffff, reg instead expand it as zero extension. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@186839 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 820ba1b..a93d3cd 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2012-04-25 Jakub Jelinek + + PR target/53110 + * config/i386/i386.md (and3): For andq $0xffffffff, reg + instead expand it as zero extension. + 2012-04-25 H.J. Lu PR debug/52857 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 0b2fe55..60439f9 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -7694,7 +7694,17 @@ (and:SWIM (match_operand:SWIM 1 "nonimmediate_operand") (match_operand:SWIM 2 "")))] "" - "ix86_expand_binary_operator (AND, mode, operands); DONE;") +{ + if (mode == DImode + && GET_CODE (operands[2]) == CONST_INT + && INTVAL (operands[2]) == (HOST_WIDE_INT) 0xffffffff + && REG_P (operands[1])) + emit_insn (gen_zero_extendsidi2 (operands[0], + gen_lowpart (SImode, operands[1]))); + else + ix86_expand_binary_operator (AND, mode, operands); + DONE; +}) (define_insn "*anddi_1" [(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r,r")