From: Richard Fitzgerald Date: Sat, 6 Mar 2021 18:55:53 +0000 (+0000) Subject: ASoC: cs42l42: Wait for PLL to lock before switching to it X-Git-Tag: v5.15~992^2~1^2~192^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b7d00776ebf79402216434ce24a87f072e1438e1;p=platform%2Fkernel%2Flinux-starfive.git ASoC: cs42l42: Wait for PLL to lock before switching to it The PLL should have locked before using it to supply MCLK. Signed-off-by: Richard Fitzgerald Signed-off-by: Lucas Tanure Link: https://lore.kernel.org/r/20210306185553.62053-16-tanureal@opensource.cirrus.com Signed-off-by: Mark Brown --- diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c index d7a314aa59b7..bf982e145e94 100644 --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c @@ -862,6 +862,7 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream) struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component); unsigned int regval; u8 fullScaleVol; + int ret; if (mute) { /* Mute the headphone */ @@ -887,9 +888,18 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream) } else { if (!cs42l42->stream_use) { /* SCLK must be running before codec unmute */ - if ((cs42l42->bclk < 11289600) && (cs42l42->sclk < 11289600)) + if ((cs42l42->bclk < 11289600) && (cs42l42->sclk < 11289600)) { snd_soc_component_update_bits(component, CS42L42_PLL_CTL1, CS42L42_PLL_START_MASK, 1); + ret = regmap_read_poll_timeout(cs42l42->regmap, + CS42L42_PLL_LOCK_STATUS, + regval, + (regval & 1), + CS42L42_PLL_LOCK_POLL_US, + CS42L42_PLL_LOCK_TIMEOUT_US); + if (ret < 0) + dev_warn(component->dev, "PLL failed to lock: %d\n", ret); + } /* Mark SCLK as present, turn off internal oscillator */ regmap_multi_reg_write(cs42l42->regmap, cs42l42_to_sclk_seq, diff --git a/sound/soc/codecs/cs42l42.h b/sound/soc/codecs/cs42l42.h index 214cee762709..36b763f0d1a0 100644 --- a/sound/soc/codecs/cs42l42.h +++ b/sound/soc/codecs/cs42l42.h @@ -756,6 +756,8 @@ #define CS42L42_NUM_SUPPLIES 5 #define CS42L42_BOOT_TIME_US 3000 #define CS42L42_CLOCK_SWITCH_DELAY_US 150 +#define CS42L42_PLL_LOCK_POLL_US 250 +#define CS42L42_PLL_LOCK_TIMEOUT_US 1250 static const char *const cs42l42_supply_names[CS42L42_NUM_SUPPLIES] = { "VA",