From: Vladimir Murzin <vladimir.murzin@arm.com>
Date: Mon, 24 Apr 2017 09:41:53 +0000 (+0100)
Subject: ARM: 8671/1: V7M: Preserve registers across switch from Thread to Handler mode
X-Git-Tag: v4.12-rc1~69^2^2~1
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b70cd406d7fe9976962d621d8c60d324eb47d284;p=platform%2Fkernel%2Flinux-exynos.git

ARM: 8671/1: V7M: Preserve registers across switch from Thread to Handler mode

According to ARMv7 ARM, when exception is taken content of r0-r3, r12
is unknown (see ExceptionTaken() pseudocode). Even though existent
implementations keep these register unchanged, preserve them to be in
line with architecture.

Reported-by: Dobromir Stefanov <dobromir.stefanov@arm.com>
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---

diff --git a/arch/arm/mm/proc-v7m.S b/arch/arm/mm/proc-v7m.S
index 8dea616..11ae6b8 100644
--- a/arch/arm/mm/proc-v7m.S
+++ b/arch/arm/mm/proc-v7m.S
@@ -135,9 +135,11 @@ __v7m_setup_cont:
 	dsb
 	mov	r6, lr			@ save LR
 	ldr	sp, =init_thread_union + THREAD_START_SP
+	stmia	sp, {r0-r3, r12}
 	cpsie	i
 	svc	#0
 1:	cpsid	i
+	ldmia	sp, {r0-r3, r12}
 	str	r5, [r12, #11 * 4]	@ restore the original SVC vector entry
 	mov	lr, r6			@ restore LR