From: Clivia.Cai <Clivia.Cai@starfivetech.com>
Date: Thu, 14 Apr 2022 11:10:51 +0000 (-0700)
Subject: dt-bingings:can:update jh7110 can dt-bingings.
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b67f7132ab5a708c06bead3469514aacd79322f4;p=platform%2Fkernel%2Flinux-starfive.git

dt-bingings:can:update jh7110 can dt-bingings.

Update jh7110 can/canfd dt-bindings configuration

Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
---

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
old mode 100755
new mode 100644
index b67a8da..a138971
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -638,19 +638,47 @@
 
 		ipmscan0: can@130d0000 {
 			compatible = "ipms,can";
-			reg = <0x0 0x130d0000 0x0 0x1000>;
-			clocks = <&canclk>;
-			clock-names = "ipms_can_clk";
+			reg = <0x0 0x130d0000 0x0 0x1000>,
+				<0x0 0x13030000 0x0 0x10000>;
+			reg-names = "reg_base","sys_syscon";
 			interrupts = <112>;
+			clocks = <&canclk>,
+				<&clkgen JH7110_CAN0_CTRL_CLK_APB>,
+				<&clkgen JH7110_CAN0_CTRL_CLK_CAN>,
+				<&clkgen JH7110_CAN0_CTRL_CLK_TIMER>;
+			clock-names = "ipms_can_clk",
+					"apb_clk",
+					"core_clk",
+					"timer_clk";
+			resets = <&rstgen RSTN_U0_CAN_CTRL_APB>,
+				<&rstgen RSTN_U0_CAN_CTRL_CORE>,
+				<&rstgen RSTN_U0_CAN_CTRL_TIMER>;
+			reset-names = "rst_apb",
+					"rst_core",
+					"rst_timer";
 			status = "disabled";
 		};
 
 		ipmscan1: can@130c0000 {
-			compatible = "ipms,canfd";
-			reg = <0x0 0x130c0000 0x0 0x1000>;
-			clocks = <&canclk>;
-			clock-names = "ipms_can_clk";
+			compatible = "ipms,can";
+			reg = <0x0 0x130c0000 0x0 0x1000>,
+				<0x0 0x13030000 0x0 0x10000>;
+			reg-names = "reg_base","sys_syscon";
 			interrupts = <113>;
+			clocks = <&canclk>,
+				<&clkgen JH7110_CAN1_CTRL_CLK_APB>,
+				<&clkgen JH7110_CAN1_CTRL_CLK_CAN>,
+				<&clkgen JH7110_CAN1_CTRL_CLK_TIMER>;
+			clock-names = "ipms_can_clk",
+					"apb_clk",
+					"core_clk",
+					"timer_clk";
+			resets = <&rstgen RSTN_U1_CAN_CTRL_APB>,
+				<&rstgen RSTN_U1_CAN_CTRL_CORE>,
+				<&rstgen RSTN_U1_CAN_CTRL_TIMER>;
+			reset-names = "rst_apb",
+					"rst_core",
+					"rst_timer";
 			status = "disabled";
 		};