From: Ioana Radulescu Date: Wed, 11 Oct 2017 13:29:45 +0000 (-0500) Subject: staging: fsl-dpaa2/eth: Check SGT final bit is present X-Git-Tag: v5.15~10046^2~80 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b63baf7137688ff7989829137dab8fd548fa9399;p=platform%2Fkernel%2Flinux-starfive.git staging: fsl-dpaa2/eth: Check SGT final bit is present For scatter-gather ingress frames, we expect to receive a list of fragments from the hardware, last of which is marked with a "final" bit. Add a check to make sure the Rx frame has this bit set correctly; there's not much we can do in case of a malformed frame, but at least issue a warning. Signed-off-by: Ioana Radulescu Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c index e9fe1c9..6f009d1 100644 --- a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.c @@ -213,6 +213,8 @@ static struct sk_buff *build_frag_skb(struct dpaa2_eth_priv *priv, break; } + WARN_ONCE(i == DPAA2_ETH_MAX_SG_ENTRIES, "Final bit not set in SGT"); + /* Count all data buffers + SG table buffer */ ch->buf_count -= i + 2;