From: Roman Lebedev Date: Mon, 4 Oct 2021 16:30:00 +0000 (+0300) Subject: [X86][Costmodel] Load/store i32/f32 Stride=4 VF=2 interleaving costs X-Git-Tag: upstream/15.0.7~29601 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b6234c1edffc8286815c61887eb02fd6ddab0090;p=platform%2Fupstream%2Fllvm.git [X86][Costmodel] Load/store i32/f32 Stride=4 VF=2 interleaving costs Finally, we are getting to the heavy-hitter stuff! The only sched models that for cpu's that support avx2 but not avx512 are: haswell, broadwell, skylake, zen1-3 For load we have: https://godbolt.org/z/7crGWoar6 - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0` So could pick cost of `4`. For store we have: https://godbolt.org/z/T8aq3MszM - for intels `Block RThroughput: =5.0`; for ryzens, `Block RThroughput: <=2.0` So we could pick cost of `5`. I'm directly using the shuffling asm the llc produced, without any manual fixups that may be needed to ensure sequential execution. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D111060 --- diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index 37fe25a..23c68bb 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -5128,6 +5128,8 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2( {4, MVT::v16i16, 75}, // (load 64i16 and) deinterleave into 4 x 16i16 {4, MVT::v32i16, 150}, // (load 128i16 and) deinterleave into 4 x 32i16 + {4, MVT::v2i32, 4}, // (load 8i32 and) deinterleave into 4 x 2i32 + {6, MVT::v2i8, 6}, // (load 12i8 and) deinterleave into 6 x 2i8 {6, MVT::v4i8, 14}, // (load 24i8 and) deinterleave into 6 x 4i8 {6, MVT::v8i8, 18}, // (load 48i8 and) deinterleave into 6 x 8i8 @@ -5200,6 +5202,8 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2( {4, MVT::v16i16, 32}, // interleave 4 x 16i16 into 64i16 (and store) {4, MVT::v32i16, 64}, // interleave 4 x 32i16 into 128i16 (and store) + {4, MVT::v2i32, 5}, // interleave 4 x 2i32 into 8i32 (and store) + {6, MVT::v2i8, 7}, // interleave 6 x 2i8 into 12i8 (and store) {6, MVT::v4i8, 9}, // interleave 6 x 4i8 into 24i8 (and store) {6, MVT::v8i8, 16}, // interleave 6 x 8i8 into 48i8 (and store) diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll index 93f7056..267e044 100644 --- a/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll +++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll @@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu" ; AVX1: LV: Found an estimated cost of 152 for VF 16 For instruction: %v0 = load float, float* %in0, align 4 ; ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load float, float* %in0, align 4 -; AVX2: LV: Found an estimated cost of 15 for VF 2 For instruction: %v0 = load float, float* %in0, align 4 +; AVX2: LV: Found an estimated cost of 5 for VF 2 For instruction: %v0 = load float, float* %in0, align 4 ; AVX2: LV: Found an estimated cost of 34 for VF 4 For instruction: %v0 = load float, float* %in0, align 4 ; AVX2: LV: Found an estimated cost of 76 for VF 8 For instruction: %v0 = load float, float* %in0, align 4 ; AVX2: LV: Found an estimated cost of 152 for VF 16 For instruction: %v0 = load float, float* %in0, align 4 diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll index 9aaafab..6e389d8 100644 --- a/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll +++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll @@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu" ; AVX1: LV: Found an estimated cost of 184 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4 ; ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i32, i32* %in0, align 4 -; AVX2: LV: Found an estimated cost of 21 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4 +; AVX2: LV: Found an estimated cost of 5 for VF 2 For instruction: %v0 = load i32, i32* %in0, align 4 ; AVX2: LV: Found an estimated cost of 42 for VF 4 For instruction: %v0 = load i32, i32* %in0, align 4 ; AVX2: LV: Found an estimated cost of 92 for VF 8 For instruction: %v0 = load i32, i32* %in0, align 4 ; AVX2: LV: Found an estimated cost of 184 for VF 16 For instruction: %v0 = load i32, i32* %in0, align 4 diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll index a8c3e27..cbd27c5 100644 --- a/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll +++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll @@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu" ; AVX1: LV: Found an estimated cost of 152 for VF 16 For instruction: store float %v3, float* %out3, align 4 ; ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store float %v3, float* %out3, align 4 -; AVX2: LV: Found an estimated cost of 13 for VF 2 For instruction: store float %v3, float* %out3, align 4 +; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: store float %v3, float* %out3, align 4 ; AVX2: LV: Found an estimated cost of 30 for VF 4 For instruction: store float %v3, float* %out3, align 4 ; AVX2: LV: Found an estimated cost of 76 for VF 8 For instruction: store float %v3, float* %out3, align 4 ; AVX2: LV: Found an estimated cost of 152 for VF 16 For instruction: store float %v3, float* %out3, align 4 diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll index cb3a704..7b8d321 100644 --- a/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll +++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll @@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu" ; AVX1: LV: Found an estimated cost of 184 for VF 16 For instruction: store i32 %v3, i32* %out3, align 4 ; ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i32 %v3, i32* %out3, align 4 -; AVX2: LV: Found an estimated cost of 19 for VF 2 For instruction: store i32 %v3, i32* %out3, align 4 +; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: store i32 %v3, i32* %out3, align 4 ; AVX2: LV: Found an estimated cost of 38 for VF 4 For instruction: store i32 %v3, i32* %out3, align 4 ; AVX2: LV: Found an estimated cost of 92 for VF 8 For instruction: store i32 %v3, i32* %out3, align 4 ; AVX2: LV: Found an estimated cost of 184 for VF 16 For instruction: store i32 %v3, i32* %out3, align 4