From: Jisheng Zhang Date: Sun, 2 Oct 2022 04:49:31 +0000 (+0530) Subject: riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK X-Git-Tag: v6.1-rc5~198^2^2 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b60ca69715fcc39a5f4bdd56ca2ea691b7358455;p=platform%2Fkernel%2Flinux-starfive.git riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK Move POSIX CPU timer expiry and signal delivery into task context to allow PREEMPT_RT setups to coexist with KVM. Signed-off-by: Jisheng Zhang Reviewed-by: Andrew Jones Signed-off-by: Anup Patel --- diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d6b0ffd..74082e2 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -103,6 +103,7 @@ config RISCV select HAVE_PERF_EVENTS select HAVE_PERF_REGS select HAVE_PERF_USER_STACK_DUMP + select HAVE_POSIX_CPU_TIMERS_TASK_WORK select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_FUNCTION_ARG_ACCESS_API select HAVE_STACKPROTECTOR