From: Antti Järvinen Date: Mon, 15 Mar 2021 10:26:06 +0000 (+0000) Subject: PCI: Mark TI C667X to avoid bus reset X-Git-Tag: accepted/tizen/unified/20230118.172025~7053^2~6 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b5cf198e74a91073d12839a3e2db99994a39995d;p=platform%2Fkernel%2Flinux-rpi.git PCI: Mark TI C667X to avoid bus reset Some TI KeyStone C667X devices do not support bus/hot reset. The PCIESS automatically disables LTSSM when Secondary Bus Reset is received and device stops working. Prevent bus reset for these devices. With this change, the device can be assigned to VMs with VFIO, but it will leak state between VMs. Reference: https://e2e.ti.com/support/processors/f/791/t/954382 Link: https://lore.kernel.org/r/20210315102606.17153-1-antti.jarvinen@gmail.com Signed-off-by: Antti Järvinen Signed-off-by: Bjorn Helgaas Reviewed-by: Kishon Vijay Abraham I Cc: stable@vger.kernel.org --- diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index dcb229d..de0c110 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -3566,6 +3566,16 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset); */ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset); +/* + * Some TI KeyStone C667X devices do not support bus/hot reset. The PCIESS + * automatically disables LTSSM when Secondary Bus Reset is received and + * the device stops working. Prevent bus reset for these devices. With + * this change, the device can be assigned to VMs with VFIO, but it will + * leak state between VMs. Reference + * https://e2e.ti.com/support/processors/f/791/t/954382 + */ +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, 0xb005, quirk_no_bus_reset); + static void quirk_no_pm_reset(struct pci_dev *dev) { /*