From: Mark Brown Date: Thu, 13 Jul 2023 00:13:18 +0000 (+0100) Subject: ASoC: cs42l51: Update to use maple tree register cache X-Git-Tag: v6.6.7~1940^2^2~202^2~43 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b5a0e5e4bf96de3d34f3d36afc32b3e9cd0376c2;p=platform%2Fkernel%2Flinux-starfive.git ASoC: cs42l51: Update to use maple tree register cache The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs42l51 driver to use the more modern data structure. Acked-by: Charles Keepax Signed-off-by: Mark Brown Link: https://lore.kernel.org/r/20230713-asoc-cirrus-maple-v1-5-a62651831735@kernel.org Signed-off-by: Mark Brown --- diff --git a/sound/soc/codecs/cs42l51.c b/sound/soc/codecs/cs42l51.c index a67cd3e..36066fac 100644 --- a/sound/soc/codecs/cs42l51.c +++ b/sound/soc/codecs/cs42l51.c @@ -703,7 +703,7 @@ const struct regmap_config cs42l51_regmap = { .volatile_reg = cs42l51_volatile_reg, .writeable_reg = cs42l51_writeable_reg, .max_register = CS42L51_CHARGE_FREQ, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_MAPLE, }; EXPORT_SYMBOL_GPL(cs42l51_regmap);