From: Simon Pilgrim Date: Mon, 7 Nov 2016 13:34:29 +0000 (+0000) Subject: [X86][AVX512] Add AVX512VL/AVX512BWVL vector truncation tests X-Git-Tag: llvmorg-4.0.0-rc1~5361 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b56c731f187e2f03e7de657f1d226c40954b2734;p=platform%2Fupstream%2Fllvm.git [X86][AVX512] Add AVX512VL/AVX512BWVL vector truncation tests llvm-svn: 286105 --- diff --git a/llvm/test/CodeGen/X86/vector-trunc.ll b/llvm/test/CodeGen/X86/vector-trunc.ll index 43a6388..6864f90 100644 --- a/llvm/test/CodeGen/X86/vector-trunc.ll +++ b/llvm/test/CodeGen/X86/vector-trunc.ll @@ -5,7 +5,9 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512VL ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BW +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BWVL define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) { ; SSE2-LABEL: trunc8i64_8i32: @@ -251,12 +253,29 @@ define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq ; -; AVX512-LABEL: trunc8i32_8i16: -; AVX512: # BB#0: # %entry -; AVX512-NEXT: # kill: %YMM0 %YMM0 %ZMM0 -; AVX512-NEXT: vpmovdw %zmm0, %ymm0 -; AVX512-NEXT: # kill: %XMM0 %XMM0 %YMM0 -; AVX512-NEXT: retq +; AVX512F-LABEL: trunc8i32_8i16: +; AVX512F: # BB#0: # %entry +; AVX512F-NEXT: # kill: %YMM0 %YMM0 %ZMM0 +; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 +; AVX512F-NEXT: # kill: %XMM0 %XMM0 %YMM0 +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: trunc8i32_8i16: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: trunc8i32_8i16: +; AVX512BW: # BB#0: # %entry +; AVX512BW-NEXT: # kill: %YMM0 %YMM0 %ZMM0 +; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 +; AVX512BW-NEXT: # kill: %XMM0 %XMM0 %YMM0 +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc8i32_8i16: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 +; AVX512BWVL-NEXT: retq entry: %0 = trunc <8 x i32> %a to <8 x i16> ret <8 x i16> %0 @@ -311,13 +330,31 @@ define void @trunc8i32_8i8(<8 x i32> %a) { ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq ; -; AVX512-LABEL: trunc8i32_8i8: -; AVX512: # BB#0: # %entry -; AVX512-NEXT: # kill: %YMM0 %YMM0 %ZMM0 -; AVX512-NEXT: vpmovdw %zmm0, %ymm0 -; AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] -; AVX512-NEXT: vmovq %xmm0, (%rax) -; AVX512-NEXT: retq +; AVX512F-LABEL: trunc8i32_8i8: +; AVX512F: # BB#0: # %entry +; AVX512F-NEXT: # kill: %YMM0 %YMM0 %ZMM0 +; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 +; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] +; AVX512F-NEXT: vmovq %xmm0, (%rax) +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: trunc8i32_8i8: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpmovdb %ymm0, (%rax) +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: trunc8i32_8i8: +; AVX512BW: # BB#0: # %entry +; AVX512BW-NEXT: # kill: %YMM0 %YMM0 %ZMM0 +; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 +; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] +; AVX512BW-NEXT: vmovq %xmm0, (%rax) +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc8i32_8i8: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpmovdb %ymm0, (%rax) +; AVX512BWVL-NEXT: retq entry: %0 = trunc <8 x i32> %a to <8 x i8> store <8 x i8> %0, <8 x i8>* undef, align 4 @@ -521,12 +558,24 @@ define void @trunc16i16_16i8(<16 x i16> %a) { ; AVX512F-NEXT: vmovdqu %xmm0, (%rax) ; AVX512F-NEXT: retq ; +; AVX512VL-LABEL: trunc16i16_16i8: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpmovsxwd %ymm0, %zmm0 +; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512VL-NEXT: vmovdqu32 %xmm0, (%rax) +; AVX512VL-NEXT: retq +; ; AVX512BW-LABEL: trunc16i16_16i8: ; AVX512BW: # BB#0: # %entry ; AVX512BW-NEXT: # kill: %YMM0 %YMM0 %ZMM0 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 ; AVX512BW-NEXT: vmovdqu %xmm0, (%rax) ; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc16i16_16i8: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rax) +; AVX512BWVL-NEXT: retq entry: %0 = trunc <16 x i16> %a to <16 x i8> store <16 x i8> %0, <16 x i8>* undef, align 4 @@ -615,10 +664,25 @@ define void @trunc32i16_32i8(<32 x i16> %a) { ; AVX512F-NEXT: vmovdqu %ymm0, (%rax) ; AVX512F-NEXT: retq ; +; AVX512VL-LABEL: trunc32i16_32i8: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpmovsxwd %ymm0, %zmm0 +; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512VL-NEXT: vpmovsxwd %ymm1, %zmm1 +; AVX512VL-NEXT: vpmovdb %zmm1, %xmm1 +; AVX512VL-NEXT: vinserti32x4 $1, %xmm1, %ymm0, %ymm0 +; AVX512VL-NEXT: vmovdqu32 %ymm0, (%rax) +; AVX512VL-NEXT: retq +; ; AVX512BW-LABEL: trunc32i16_32i8: ; AVX512BW: # BB#0: # %entry ; AVX512BW-NEXT: vpmovwb %zmm0, (%rax) ; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc32i16_32i8: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpmovwb %zmm0, (%rax) +; AVX512BWVL-NEXT: retq entry: %0 = trunc <32 x i16> %a to <32 x i8> store <32 x i8> %0, <32 x i8>* undef, align 4 @@ -678,14 +742,37 @@ define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) { ; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; -; AVX512-LABEL: trunc2x4i64_8i32: -; AVX512: # BB#0: # %entry -; AVX512-NEXT: # kill: %YMM1 %YMM1 %ZMM1 -; AVX512-NEXT: # kill: %YMM0 %YMM0 %ZMM0 -; AVX512-NEXT: vpmovqd %zmm0, %ymm0 -; AVX512-NEXT: vpmovqd %zmm1, %ymm1 -; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 -; AVX512-NEXT: retq +; AVX512F-LABEL: trunc2x4i64_8i32: +; AVX512F: # BB#0: # %entry +; AVX512F-NEXT: # kill: %YMM1 %YMM1 %ZMM1 +; AVX512F-NEXT: # kill: %YMM0 %YMM0 %ZMM0 +; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 +; AVX512F-NEXT: vpmovqd %zmm1, %ymm1 +; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: trunc2x4i64_8i32: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpmovqd %ymm0, %xmm0 +; AVX512VL-NEXT: vpmovqd %ymm1, %xmm1 +; AVX512VL-NEXT: vinserti32x4 $1, %xmm1, %ymm0, %ymm0 +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: trunc2x4i64_8i32: +; AVX512BW: # BB#0: # %entry +; AVX512BW-NEXT: # kill: %YMM1 %YMM1 %ZMM1 +; AVX512BW-NEXT: # kill: %YMM0 %YMM0 %ZMM0 +; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 +; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1 +; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc2x4i64_8i32: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpmovqd %ymm0, %xmm0 +; AVX512BWVL-NEXT: vpmovqd %ymm1, %xmm1 +; AVX512BWVL-NEXT: vinserti32x4 $1, %xmm1, %ymm0, %ymm0 +; AVX512BWVL-NEXT: retq entry: %0 = trunc <4 x i64> %a to <4 x i32> %1 = trunc <4 x i64> %b to <4 x i32> @@ -771,17 +858,55 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq ; -; AVX512-LABEL: trunc2x4i64_8i16: -; AVX512: # BB#0: # %entry -; AVX512-NEXT: # kill: %YMM1 %YMM1 %ZMM1 -; AVX512-NEXT: # kill: %YMM0 %YMM0 %ZMM0 -; AVX512-NEXT: vpmovqd %zmm0, %ymm0 -; AVX512-NEXT: vpmovqd %zmm1, %ymm1 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] -; AVX512-NEXT: retq +; AVX512F-LABEL: trunc2x4i64_8i16: +; AVX512F: # BB#0: # %entry +; AVX512F-NEXT: # kill: %YMM1 %YMM1 %ZMM1 +; AVX512F-NEXT: # kill: %YMM0 %YMM0 %ZMM0 +; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 +; AVX512F-NEXT: vpmovqd %zmm1, %ymm1 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] +; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm1 +; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm0 +; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: trunc2x4i64_8i16: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpmovqd %ymm0, %xmm0 +; AVX512VL-NEXT: vpmovqd %ymm1, %xmm1 +; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] +; AVX512VL-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] +; AVX512VL-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] +; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] +; AVX512VL-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7] +; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] +; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: trunc2x4i64_8i16: +; AVX512BW: # BB#0: # %entry +; AVX512BW-NEXT: # kill: %YMM1 %YMM1 %ZMM1 +; AVX512BW-NEXT: # kill: %YMM0 %YMM0 %ZMM0 +; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 +; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] +; AVX512BW-NEXT: vpshufb %xmm2, %xmm1, %xmm1 +; AVX512BW-NEXT: vpshufb %xmm2, %xmm0, %xmm0 +; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc2x4i64_8i16: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpmovqd %ymm0, %xmm0 +; AVX512BWVL-NEXT: vpmovqd %ymm1, %xmm1 +; AVX512BWVL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] +; AVX512BWVL-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] +; AVX512BWVL-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] +; AVX512BWVL-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] +; AVX512BWVL-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7] +; AVX512BWVL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] +; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512BWVL-NEXT: retq entry: %0 = trunc <4 x i64> %a to <4 x i16> %1 = trunc <4 x i64> %b to <4 x i16> @@ -851,11 +976,29 @@ define i64 @trunc2i64_i64(<2 x i64> %inval) { ; AVX-NEXT: vmovq %xmm0, %rax ; AVX-NEXT: retq ; -; AVX512-LABEL: trunc2i64_i64: -; AVX512: # BB#0: # %entry -; AVX512-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] -; AVX512-NEXT: vmovq %xmm0, %rax -; AVX512-NEXT: retq +; AVX512F-LABEL: trunc2i64_i64: +; AVX512F: # BB#0: # %entry +; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] +; AVX512F-NEXT: vmovq %xmm0, %rax +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: trunc2i64_i64: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpmovqd %xmm0, -{{[0-9]+}}(%rsp) +; AVX512VL-NEXT: movq -{{[0-9]+}}(%rsp), %rax +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: trunc2i64_i64: +; AVX512BW: # BB#0: # %entry +; AVX512BW-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] +; AVX512BW-NEXT: vmovq %xmm0, %rax +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc2i64_i64: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpmovqd %xmm0, -{{[0-9]+}}(%rsp) +; AVX512BWVL-NEXT: movq -{{[0-9]+}}(%rsp), %rax +; AVX512BWVL-NEXT: retq entry: %0 = trunc <2 x i64> %inval to <2 x i32> %1 = bitcast <2 x i32> %0 to i64 @@ -898,13 +1041,43 @@ define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX-NEXT: retq ; -; AVX512-LABEL: trunc2x4i32_8i16: -; AVX512: # BB#0: # %entry -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] -; AVX512-NEXT: retq +; AVX512F-LABEL: trunc2x4i32_8i16: +; AVX512F: # BB#0: # %entry +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] +; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm1 +; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm0 +; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: trunc2x4i32_8i16: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] +; AVX512VL-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] +; AVX512VL-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] +; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] +; AVX512VL-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7] +; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] +; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: trunc2x4i32_8i16: +; AVX512BW: # BB#0: # %entry +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] +; AVX512BW-NEXT: vpshufb %xmm2, %xmm1, %xmm1 +; AVX512BW-NEXT: vpshufb %xmm2, %xmm0, %xmm0 +; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc2x4i32_8i16: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] +; AVX512BWVL-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] +; AVX512BWVL-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] +; AVX512BWVL-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] +; AVX512BWVL-NEXT: vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7] +; AVX512BWVL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] +; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512BWVL-NEXT: retq entry: %0 = trunc <4 x i32> %a to <4 x i16> %1 = trunc <4 x i32> %b to <4 x i16> @@ -940,11 +1113,29 @@ define i64 @trunc4i32_i64(<4 x i32> %inval) { ; AVX-NEXT: vmovq %xmm0, %rax ; AVX-NEXT: retq ; -; AVX512-LABEL: trunc4i32_i64: -; AVX512: # BB#0: # %entry -; AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] -; AVX512-NEXT: vmovq %xmm0, %rax -; AVX512-NEXT: retq +; AVX512F-LABEL: trunc4i32_i64: +; AVX512F: # BB#0: # %entry +; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] +; AVX512F-NEXT: vmovq %xmm0, %rax +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: trunc4i32_i64: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpmovdw %xmm0, -{{[0-9]+}}(%rsp) +; AVX512VL-NEXT: movq -{{[0-9]+}}(%rsp), %rax +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: trunc4i32_i64: +; AVX512BW: # BB#0: # %entry +; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] +; AVX512BW-NEXT: vmovq %xmm0, %rax +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc4i32_i64: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpmovdw %xmm0, -{{[0-9]+}}(%rsp) +; AVX512BWVL-NEXT: movq -{{[0-9]+}}(%rsp), %rax +; AVX512BWVL-NEXT: retq entry: %0 = trunc <4 x i32> %inval to <4 x i16> %1 = bitcast <4 x i16> %0 to i64 @@ -984,13 +1175,37 @@ define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) { ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX-NEXT: retq ; -; AVX512-LABEL: trunc2x8i16_16i8: -; AVX512: # BB#0: # %entry -; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> -; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 -; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] -; AVX512-NEXT: retq +; AVX512F-LABEL: trunc2x8i16_16i8: +; AVX512F: # BB#0: # %entry +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> +; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm1 +; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm0 +; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: trunc2x8i16_16i8: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vmovdqa64 {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> +; AVX512VL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 +; AVX512VL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 +; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: trunc2x8i16_16i8: +; AVX512BW: # BB#0: # %entry +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> +; AVX512BW-NEXT: vpshufb %xmm2, %xmm1, %xmm1 +; AVX512BW-NEXT: vpshufb %xmm2, %xmm0, %xmm0 +; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc2x8i16_16i8: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vmovdqu8 {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> +; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm1, %xmm1 +; AVX512BWVL-NEXT: vpshufb %xmm2, %xmm0, %xmm0 +; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] +; AVX512BWVL-NEXT: retq entry: %0 = trunc <8 x i16> %a to <8 x i8> %1 = trunc <8 x i16> %b to <8 x i8> @@ -1025,11 +1240,29 @@ define i64 @trunc8i16_i64(<8 x i16> %inval) { ; AVX-NEXT: vmovq %xmm0, %rax ; AVX-NEXT: retq ; -; AVX512-LABEL: trunc8i16_i64: -; AVX512: # BB#0: # %entry -; AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] -; AVX512-NEXT: vmovq %xmm0, %rax -; AVX512-NEXT: retq +; AVX512F-LABEL: trunc8i16_i64: +; AVX512F: # BB#0: # %entry +; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] +; AVX512F-NEXT: vmovq %xmm0, %rax +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: trunc8i16_i64: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] +; AVX512VL-NEXT: vmovq %xmm0, %rax +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: trunc8i16_i64: +; AVX512BW: # BB#0: # %entry +; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] +; AVX512BW-NEXT: vmovq %xmm0, %rax +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc8i16_i64: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpmovwb %xmm0, -{{[0-9]+}}(%rsp) +; AVX512BWVL-NEXT: movq -{{[0-9]+}}(%rsp), %rax +; AVX512BWVL-NEXT: retq entry: %0 = trunc <8 x i16> %inval to <8 x i8> %1 = bitcast <8 x i8> %0 to i64 @@ -1047,10 +1280,25 @@ define <16 x i8> @trunc16i64_16i8_const() { ; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0 ; AVX-NEXT: retq ; -; AVX512-LABEL: trunc16i64_16i8_const: -; AVX512: # BB#0: # %entry -; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0 -; AVX512-NEXT: retq +; AVX512F-LABEL: trunc16i64_16i8_const: +; AVX512F: # BB#0: # %entry +; AVX512F-NEXT: vxorps %xmm0, %xmm0, %xmm0 +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: trunc16i64_16i8_const: +; AVX512VL: # BB#0: # %entry +; AVX512VL-NEXT: vpxord %xmm0, %xmm0, %xmm0 +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: trunc16i64_16i8_const: +; AVX512BW: # BB#0: # %entry +; AVX512BW-NEXT: vxorps %xmm0, %xmm0, %xmm0 +; AVX512BW-NEXT: retq +; +; AVX512BWVL-LABEL: trunc16i64_16i8_const: +; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL-NEXT: vpxord %xmm0, %xmm0, %xmm0 +; AVX512BWVL-NEXT: retq entry: %0 = trunc <16 x i64> zeroinitializer to <16 x i8>