From: Sjoerd Meijer <sjoerd.meijer@arm.com>
Date: Fri, 13 Sep 2019 09:44:13 +0000 (+0000)
Subject: [AArch64] More @llvm.fma.f16 tests
X-Git-Tag: llvmorg-11-init~9270
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b55456aaa065167d8f93d3cf8cd83ad16d7ab4b2;p=platform%2Fupstream%2Fllvm.git

[AArch64] More @llvm.fma.f16 tests

Follow up of rL371321 that added FMA FP16 patterns. This adds more tests
for @llvm.fma.f16. This probably shows we miss one fmsub optimisation
opportunity, which I will look into.

llvm-svn: 371833
---

diff --git a/llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_3op.ll b/llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_3op.ll
index d43834d..9a5a0a5 100644
--- a/llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_3op.ll
+++ b/llvm/test/CodeGen/AArch64/fp16_intrinsic_scalar_3op.ll
@@ -1,6 +1,4 @@
-; RUN: llc < %s -mtriple=aarch64-eabi -mattr=+v8.2a,+fullfp16  | FileCheck %s
-
-declare half @llvm.fma.f16(half, half, half)
+; RUN: llc < %s -mtriple=aarch64-eabi -mattr=+v8.2a,+neon,+fullfp16  | FileCheck %s
 
 define dso_local half @t_vfmah_f16(half %a, half %b, half %c) {
 ; CHECK-LABEL: t_vfmah_f16:
@@ -11,3 +9,45 @@ entry:
   ret half %0
 }
 
+define half @fnma16(half %a, half %b, half %c) nounwind readnone ssp {
+entry:
+; CHECK-LABEL: fnma16:
+; CHECK: fnmadd h0, h0, h1, h2
+  %0 = tail call half @llvm.fma.f16(half %a, half %b, half %c)
+  %mul = fmul half %0, -1.000000e+00
+  ret half %mul
+}
+
+define half @fms16(half %a, half %b, half %c) nounwind readnone ssp {
+entry:
+; CHECK-LABEL: fms16:
+; CHECK: fmsub h0, h0, h1, h2
+  %mul = fmul half %b, -1.000000e+00
+  %0 = tail call half @llvm.fma.f16(half %a, half %mul, half %c)
+  ret half %0
+}
+
+define half @fms16_com(half %a, half %b, half %c) nounwind readnone ssp {
+entry:
+; CHECK-LABEL: fms16_com:
+
+; FIXME:       This should be a fmsub.
+
+; CHECK:       fneg  h1, h1
+; CHECK-NEXT:  fmadd h0, h1, h0, h2
+  %mul = fmul half %b, -1.000000e+00
+  %0 = tail call half @llvm.fma.f16(half %mul, half %a, half %c)
+  ret half %0
+}
+
+define half @fnms16(half %a, half %b, half %c) nounwind readnone ssp {
+entry:
+; CHECK-LABEL: fnms16:
+; CHECK: fnmsub h0, h0, h1, h2
+  %mul = fmul half %c, -1.000000e+00
+  %0 = tail call half @llvm.fma.f16(half %a, half %b, half %mul)
+  ret half %0
+}
+
+declare half @llvm.fma.f16(half, half, half)
+