From: Simon Pilgrim Date: Tue, 7 Sep 2021 13:45:55 +0000 (+0100) Subject: [X86] X86InstrVecCompiler.td - remove unused template parameters. NFC. X-Git-Tag: upstream/15.0.7~32111 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b50a60c234433545fc1c9b39f193373f560ea869;p=platform%2Fupstream%2Fllvm.git [X86] X86InstrVecCompiler.td - remove unused template parameters. NFC. Identified in D109359 --- diff --git a/llvm/lib/Target/X86/X86InstrVecCompiler.td b/llvm/lib/Target/X86/X86InstrVecCompiler.td index 928946b..2429aa1 100644 --- a/llvm/lib/Target/X86/X86InstrVecCompiler.td +++ b/llvm/lib/Target/X86/X86InstrVecCompiler.td @@ -112,8 +112,7 @@ defm : subvector_subreg_lowering; // any moves that we can prove are unnecessary. multiclass subvec_zero_lowering { + ValueType SrcTy, SubRegIndex SubIdx> { def : Pat<(DstTy (insert_subvector immAllZerosV, (SrcTy RC:$src), (iPTR 0))), (SUBREG_TO_REG (i64 0), @@ -121,57 +120,57 @@ multiclass subvec_zero_lowering; - defm : subvec_zero_lowering<"APS", VR128, v8f32, v4f32, v8i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA", VR128, v4i64, v2i64, v8i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA", VR128, v8i32, v4i32, v8i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA", VR128, v16i16, v8i16, v8i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA", VR128, v32i8, v16i8, v8i32, sub_xmm>; + defm : subvec_zero_lowering<"APD", VR128, v4f64, v2f64, sub_xmm>; + defm : subvec_zero_lowering<"APS", VR128, v8f32, v4f32, sub_xmm>; + defm : subvec_zero_lowering<"DQA", VR128, v4i64, v2i64, sub_xmm>; + defm : subvec_zero_lowering<"DQA", VR128, v8i32, v4i32, sub_xmm>; + defm : subvec_zero_lowering<"DQA", VR128, v16i16, v8i16, sub_xmm>; + defm : subvec_zero_lowering<"DQA", VR128, v32i8, v16i8, sub_xmm>; } let Predicates = [HasVLX] in { - defm : subvec_zero_lowering<"APDZ128", VR128X, v4f64, v2f64, v8i32, sub_xmm>; - defm : subvec_zero_lowering<"APSZ128", VR128X, v8f32, v4f32, v8i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA64Z128", VR128X, v4i64, v2i64, v8i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA64Z128", VR128X, v8i32, v4i32, v8i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA64Z128", VR128X, v16i16, v8i16, v8i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA64Z128", VR128X, v32i8, v16i8, v8i32, sub_xmm>; - - defm : subvec_zero_lowering<"APDZ128", VR128X, v8f64, v2f64, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"APSZ128", VR128X, v16f32, v4f32, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA64Z128", VR128X, v8i64, v2i64, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA64Z128", VR128X, v16i32, v4i32, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA64Z128", VR128X, v32i16, v8i16, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA64Z128", VR128X, v64i8, v16i8, v16i32, sub_xmm>; - - defm : subvec_zero_lowering<"APDZ256", VR256X, v8f64, v4f64, v16i32, sub_ymm>; - defm : subvec_zero_lowering<"APSZ256", VR256X, v16f32, v8f32, v16i32, sub_ymm>; - defm : subvec_zero_lowering<"DQA64Z256", VR256X, v8i64, v4i64, v16i32, sub_ymm>; - defm : subvec_zero_lowering<"DQA64Z256", VR256X, v16i32, v8i32, v16i32, sub_ymm>; - defm : subvec_zero_lowering<"DQA64Z256", VR256X, v32i16, v16i16, v16i32, sub_ymm>; - defm : subvec_zero_lowering<"DQA64Z256", VR256X, v64i8, v32i8, v16i32, sub_ymm>; + defm : subvec_zero_lowering<"APDZ128", VR128X, v4f64, v2f64, sub_xmm>; + defm : subvec_zero_lowering<"APSZ128", VR128X, v8f32, v4f32, sub_xmm>; + defm : subvec_zero_lowering<"DQA64Z128", VR128X, v4i64, v2i64, sub_xmm>; + defm : subvec_zero_lowering<"DQA64Z128", VR128X, v8i32, v4i32, sub_xmm>; + defm : subvec_zero_lowering<"DQA64Z128", VR128X, v16i16, v8i16, sub_xmm>; + defm : subvec_zero_lowering<"DQA64Z128", VR128X, v32i8, v16i8, sub_xmm>; + + defm : subvec_zero_lowering<"APDZ128", VR128X, v8f64, v2f64, sub_xmm>; + defm : subvec_zero_lowering<"APSZ128", VR128X, v16f32, v4f32, sub_xmm>; + defm : subvec_zero_lowering<"DQA64Z128", VR128X, v8i64, v2i64, sub_xmm>; + defm : subvec_zero_lowering<"DQA64Z128", VR128X, v16i32, v4i32, sub_xmm>; + defm : subvec_zero_lowering<"DQA64Z128", VR128X, v32i16, v8i16, sub_xmm>; + defm : subvec_zero_lowering<"DQA64Z128", VR128X, v64i8, v16i8, sub_xmm>; + + defm : subvec_zero_lowering<"APDZ256", VR256X, v8f64, v4f64, sub_ymm>; + defm : subvec_zero_lowering<"APSZ256", VR256X, v16f32, v8f32, sub_ymm>; + defm : subvec_zero_lowering<"DQA64Z256", VR256X, v8i64, v4i64, sub_ymm>; + defm : subvec_zero_lowering<"DQA64Z256", VR256X, v16i32, v8i32, sub_ymm>; + defm : subvec_zero_lowering<"DQA64Z256", VR256X, v32i16, v16i16, sub_ymm>; + defm : subvec_zero_lowering<"DQA64Z256", VR256X, v64i8, v32i8, sub_ymm>; } let Predicates = [HasAVX512, NoVLX] in { - defm : subvec_zero_lowering<"APD", VR128, v8f64, v2f64, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"APS", VR128, v16f32, v4f32, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA", VR128, v8i64, v2i64, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA", VR128, v16i32, v4i32, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA", VR128, v32i16, v8i16, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"DQA", VR128, v64i8, v16i8, v16i32, sub_xmm>; - - defm : subvec_zero_lowering<"APDY", VR256, v8f64, v4f64, v16i32, sub_ymm>; - defm : subvec_zero_lowering<"APSY", VR256, v16f32, v8f32, v16i32, sub_ymm>; - defm : subvec_zero_lowering<"DQAY", VR256, v8i64, v4i64, v16i32, sub_ymm>; - defm : subvec_zero_lowering<"DQAY", VR256, v16i32, v8i32, v16i32, sub_ymm>; - defm : subvec_zero_lowering<"DQAY", VR256, v32i16, v16i16, v16i32, sub_ymm>; - defm : subvec_zero_lowering<"DQAY", VR256, v64i8, v32i8, v16i32, sub_ymm>; + defm : subvec_zero_lowering<"APD", VR128, v8f64, v2f64, sub_xmm>; + defm : subvec_zero_lowering<"APS", VR128, v16f32, v4f32, sub_xmm>; + defm : subvec_zero_lowering<"DQA", VR128, v8i64, v2i64, sub_xmm>; + defm : subvec_zero_lowering<"DQA", VR128, v16i32, v4i32, sub_xmm>; + defm : subvec_zero_lowering<"DQA", VR128, v32i16, v8i16, sub_xmm>; + defm : subvec_zero_lowering<"DQA", VR128, v64i8, v16i8, sub_xmm>; + + defm : subvec_zero_lowering<"APDY", VR256, v8f64, v4f64, sub_ymm>; + defm : subvec_zero_lowering<"APSY", VR256, v16f32, v8f32, sub_ymm>; + defm : subvec_zero_lowering<"DQAY", VR256, v8i64, v4i64, sub_ymm>; + defm : subvec_zero_lowering<"DQAY", VR256, v16i32, v8i32, sub_ymm>; + defm : subvec_zero_lowering<"DQAY", VR256, v32i16, v16i16, sub_ymm>; + defm : subvec_zero_lowering<"DQAY", VR256, v64i8, v32i8, sub_ymm>; } let Predicates = [HasFP16, HasVLX] in { - defm : subvec_zero_lowering<"APSZ128", VR128X, v16f16, v8f16, v8i32, sub_xmm>; - defm : subvec_zero_lowering<"APSZ128", VR128X, v32f16, v8f16, v16i32, sub_xmm>; - defm : subvec_zero_lowering<"APSZ256", VR256X, v32f16, v16f16, v16i32, sub_ymm>; + defm : subvec_zero_lowering<"APSZ128", VR128X, v16f16, v8f16, sub_xmm>; + defm : subvec_zero_lowering<"APSZ128", VR128X, v32f16, v8f16, sub_xmm>; + defm : subvec_zero_lowering<"APSZ256", VR256X, v32f16, v16f16, sub_ymm>; } class maskzeroupper :