From: Matt Turner <mattst88@gmail.com>
Date: Mon, 19 Oct 2015 22:08:28 +0000 (-0700)
Subject: i965: Add mask_control_ex field and handle it in compaction.
X-Git-Tag: upstream/17.1.0~15170
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b29f92daec59a4181a45175b6bfc6e636c57fb33;p=platform%2Fupstream%2Fmesa.git

i965: Add mask_control_ex field and handle it in compaction.

Documentation is sparse, but it appears to have existed on G45 and ILK
as a second bit extension of the mask_control field. Setting the pair of
bits to 0b11 enables "NoCMask".

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
---

diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index b122dec..f787ea3 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -1018,6 +1018,8 @@ brw_try_compact_instruction(const struct brw_device_info *devinfo,
 
    if (devinfo->gen >= 6) {
       compact(acc_wr_control);
+   } else {
+      compact(mask_control_ex);
    }
 
    compact(cond_modifier);
@@ -1229,6 +1231,8 @@ brw_uncompact_instruction(const struct brw_device_info *devinfo, brw_inst *dst,
 
    if (devinfo->gen >= 6) {
       uncompact(acc_wr_control);
+   } else {
+      uncompact(mask_control_ex);
    }
 
    uncompact(cond_modifier);
diff --git a/src/mesa/drivers/dri/i965/brw_inst.h b/src/mesa/drivers/dri/i965/brw_inst.h
index cb3d7e6..819ce59 100644
--- a/src/mesa/drivers/dri/i965/brw_inst.h
+++ b/src/mesa/drivers/dri/i965/brw_inst.h
@@ -182,6 +182,7 @@ F(debug_control,        30,  30)
 F(cmpt_control,         29,  29)
 FC(branch_control,      28,  28, devinfo->gen >= 8)
 FC(acc_wr_control,      28,  28, devinfo->gen >= 6)
+FC(mask_control_ex,     28,  28, devinfo->is_g4x || devinfo->gen == 5)
 F(cond_modifier,        27,  24)
 FC(math_function,       27,  24, devinfo->gen >= 6)
 F(exec_size,            23,  21)
@@ -792,6 +793,7 @@ F(cmpt_control,     29, 29) /* Same location as brw_inst */
 FC(flag_subreg_nr,  28, 28, devinfo->gen <= 6)
 F(cond_modifier,    27, 24) /* Same location as brw_inst */
 FC(acc_wr_control,  23, 23, devinfo->gen >= 6)
+FC(mask_control_ex, 23, 23, devinfo->is_g4x || devinfo->gen == 5)
 F(subreg_index,     22, 18)
 F(datatype_index,   17, 13)
 F(control_index,    12,  8)