From: Jin Kyu Song Date: Thu, 29 Aug 2013 02:15:26 +0000 (-0700) Subject: AVX-512: Add IF_SPMASK and fix IF_PFMASK X-Git-Tag: nasm-2.11.05~110^2~10 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b21f97db0e5dc785092ec168b0bacd4d1f6ddfce;p=platform%2Fupstream%2Fnasm.git AVX-512: Add IF_SPMASK and fix IF_PFMASK Defined IF_SPMASK for specific processor types and fixed IF_PFMASK to mask the exact preferred bits only. Signed-off-by: Jin Kyu Song Signed-off-by: Cyrill Gorcunov --- diff --git a/insns.h b/insns.h index ad795e2..19b27ae 100644 --- a/insns.h +++ b/insns.h @@ -132,7 +132,6 @@ extern const uint8_t nasm_bytecodes[]; #define IF_PMASK 0xFF000000UL /* the mask for processor types */ #define IF_PLEVEL 0x0F000000UL /* the mask for processor instr. level */ /* also the highest possible processor */ -#define IF_PFMASK 0xFFF0000000UL /* the mask for disassembly "prefer" */ #define IF_8086 0x00000000UL /* 8086 instruction */ #define IF_186 0x01000000UL /* 186+ instruction */ #define IF_286 0x02000000UL /* 286+ instruction */ @@ -152,5 +151,7 @@ extern const uint8_t nasm_bytecodes[]; #define IF_IA64 0x0F000000UL /* IA64 instructions (in x86 mode) */ #define IF_CYRIX 0x10000000UL /* Cyrix-specific instruction */ #define IF_AMD 0x20000000UL /* AMD-specific instruction */ +#define IF_SPMASK 0x30000000UL /* specific processor types mask */ +#define IF_PFMASK (IF_INSMASK|IF_SPMASK) /* disassembly "prefer" mask */ #endif /* NASM_INSNS_H */