From: Chris Wilson Date: Tue, 24 Sep 2019 17:35:01 +0000 (+0100) Subject: drm/i915/tgl: Swap engines for no rps (gpu reclocking) X-Git-Tag: v5.10.7~3692^2~43^2~86 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b1da91c9ddcef7ee077ea04797db7fa3a952d683;p=platform%2Fkernel%2Flinux-rpi.git drm/i915/tgl: Swap engines for no rps (gpu reclocking) If we disable rps, it appears the Tigerlake is stable enough to run multiple engines simultaneously in CI. As disabling rps should only cause the execution to be slow, whereas many features depend on the different engines, we would prefer to have the engines enabled while the machine hangs are being debugged. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111714 Signed-off-by: Chris Wilson Cc: Mika Kuoppala Acked-by: Mika Kuoppala Link: https://patchwork.freedesktop.org/patch/msgid/20190924173501.21956-1-chris@chris-wilson.co.uk --- diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 43530b0..ea53dfe 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -807,7 +807,7 @@ static const struct intel_device_info intel_tigerlake_12_info = { .display.has_modular_fia = 1, .engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), - .engine_mask = BIT(RCS0), /* XXX reduced for debugging */ + .has_rps = false, /* XXX disabled for debugging */ }; #undef GEN