From: Benjamin Herrenschmidt Date: Tue, 1 Mar 2011 04:46:09 +0000 (+1100) Subject: powerpc: Initialize TLB and LPID register on HV mode Power7 X-Git-Tag: accepted/tizen/common/20141203.182822~7541^2~126 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b144871cb5f2c268e94258ae8f1ec810db2e1120;p=platform%2Fkernel%2Flinux-arm64.git powerpc: Initialize TLB and LPID register on HV mode Power7 In case entry from the bootloader isn't "clean" Signed-off-by: Benjamin Herrenschmidt --- diff --git a/arch/powerpc/kernel/cpu_setup_power7.S b/arch/powerpc/kernel/cpu_setup_power7.S index 2390f6f..4f9a93f 100644 --- a/arch/powerpc/kernel/cpu_setup_power7.S +++ b/arch/powerpc/kernel/cpu_setup_power7.S @@ -25,7 +25,10 @@ _GLOBAL(__setup_cpu_power7) bl __init_hvmode_206 mtlr r11 beqlr + li r0,0 + mtspr SPRN_LPID,r0 bl __init_LPCR + bl __init_TLB mtlr r11 blr @@ -34,7 +37,10 @@ _GLOBAL(__restore_cpu_power7) mfmsr r3 rldicl. r0,r3,4,63 beqlr + li r0,0 + mtspr SPRN_LPID,r0 bl __init_LPCR + bl __init_TLB mtlr r11 blr @@ -71,3 +77,15 @@ __init_LPCR: mtspr SPRN_LPCR,r3 isync blr + +__init_TLB: + /* Clear the TLB */ + li r6,128 + mtctr r6 + li r7,0xc00 /* IS field = 0b11 */ + ptesync +2: tlbiel r7 + addi r7,r7,0x1000 + bdnz 2b + ptesync +1: blr