From: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Date: Wed, 29 Jun 2022 15:59:55 +0000 (-0400)
Subject: arm64: dts: mediatek: asurada: Enable SCP
X-Git-Tag: v6.1-rc5~784^2~27^2~15
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b10e80b173b608a36b2d799272884c87c054530e;p=platform%2Fkernel%2Flinux-starfive.git

arm64: dts: mediatek: asurada: Enable SCP

Enable support for the SCP co-processor present on MT8192. It is used
as part of the video encoding and decoding processes.

A region of memory is carved out for its use, and remoteproc setup for
communication with the ChromeOS EC.

Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-19-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
---

diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
index 7b89f6e..a5625b3 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
@@ -105,6 +105,12 @@
 		#size-cells = <2>;
 		ranges;
 
+		scp_mem_reserved: scp@50000000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0x50000000 0 0x2900000>;
+			no-map;
+		};
+
 		wifi_restricted_dma_region: wifi@c0000000 {
 			compatible = "restricted-dma-pool";
 			reg = <0 0xc0000000 0 0x4000000>;
@@ -680,6 +686,12 @@
 		};
 	};
 
+	scp_pins: scp-pins {
+		pins-vreq-vao {
+			pinmux = <PINMUX_GPIO195__FUNC_SCP_VREQ_VAO>;
+		};
+	};
+
 	spi1_pins: spi1-default-pins {
 		pins-cs-mosi-clk {
 			pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
@@ -735,6 +747,20 @@
 	interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
 };
 
+&scp {
+	status = "okay";
+
+	firmware-name = "mediatek/mt8192/scp.img";
+	memory-region = <&scp_mem_reserved>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&scp_pins>;
+
+	cros-ec {
+		compatible = "google,cros-ec-rpmsg";
+		mediatek,rpmsg-name = "cros-ec-rpmsg";
+	};
+};
+
 &spi1 {
 	status = "okay";