From: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Date: Mon, 26 Jul 2021 09:01:38 +0000 (+0200)
Subject: radv: Refactor some nir_channels usage to use nir_channel.
X-Git-Tag: upstream/22.3.5~17727
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=b1074fd51d55eed5cd842d51748d2e8a2e68ddfb;p=platform%2Fupstream%2Fmesa.git

radv: Refactor some nir_channels usage to use nir_channel.

cleanup, nir_channels wasn't needed as these were only accessing a
single channel.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12592>
---

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 5ba73c2..a02895c 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -294,8 +294,8 @@ lower_intrinsics(nir_shader *nir, const struct radv_pipeline_key *key,
             if (nir_intrinsic_desc_type(intrin) == VK_DESCRIPTOR_TYPE_ACCELERATION_STRUCTURE_KHR) {
                nir_ssa_def *addr =
                   convert_pointer_to_64(&b, pdev,
-                                        nir_iadd(&b, nir_channels(&b, intrin->src[0].ssa, 1),
-                                                 nir_channels(&b, intrin->src[0].ssa, 2)));
+                                        nir_iadd(&b, nir_channel(&b, intrin->src[0].ssa, 0),
+                                                 nir_channel(&b, intrin->src[0].ssa, 1)));
 
                def = nir_build_load_global(&b, 1, 64, addr, .access = ACCESS_NON_WRITEABLE,
                                            .align_mul = 8, .align_offset = 0);