From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Date: Wed, 18 Dec 2013 04:23:25 +0000 (+0530)
Subject: ath9k: Add a delay between RTC reset/clear for AR9003
X-Git-Tag: v3.14-rc1~94^2~3^2^2~137
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=afe36533c108f55c5245397a1cc82af312a32614;p=platform%2Fkernel%2Flinux-exynos.git

ath9k: Add a delay between RTC reset/clear for AR9003

The small delay that is present between a RTC reset/clear
operation is required for the chip to settle and this is
needed for all chips, not just the AR9002 family.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
---

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 2318bb9..2800914 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -1399,8 +1399,7 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
 
 	REGWRITE_BUFFER_FLUSH(ah);
 
-	if (!AR_SREV_9300_20_OR_LATER(ah))
-		udelay(2);
+	udelay(2);
 
 	if (!AR_SREV_9100(ah) && !AR_SREV_9300_20_OR_LATER(ah))
 		REG_WRITE(ah, AR_RC, 0);