From: Anand Moon Date: Thu, 27 Sep 2018 14:07:36 +0000 (+0000) Subject: ARM: dts: exynos: Add pin configuration for SD write protect on Odroid XU3/XU4/HC1 X-Git-Tag: submit/tizen/20190329.020226~107 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=afd4d4a2c0d7a243e8329e8be840241cde6a0009;p=platform%2Fkernel%2Flinux-exynos.git ARM: dts: exynos: Add pin configuration for SD write protect on Odroid XU3/XU4/HC1 Add SD card write-protect pin configuration to be sure that it will be properly pulled down to indicate write access. Suggested-by: Krzysztof Kozlowski Signed-off-by: Anand Moon Signed-off-by: Krzysztof Kozlowski [backport of mainline commit 6135ee70cb1314681772645242beee46fcf5d185] Signed-off-by: Marek Szyprowski Change-Id: Ic23dfd37330417d7b0724247354f1aed1a84b9de --- diff --git a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi index 65aa0e300c23..b8f60d908736 100644 --- a/arch/arm/boot/dts/exynos5420-pinctrl.dtsi +++ b/arch/arm/boot/dts/exynos5420-pinctrl.dtsi @@ -292,6 +292,13 @@ samsung,pin-pud = ; samsung,pin-drv = ; }; + + sd2_wp: sd2-wp { + samsung,pins = "gpc4-0"; + samsung,pin-function = ; + samsung,pin-pud = ; + samsung,pin-drv = ; + }; }; &pinctrl_2 { diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi index 0127ebcbdb5a..b375520af1a0 100644 --- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi +++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi @@ -518,7 +518,7 @@ samsung,dw-mshc-sdr-timing = <0 4>; samsung,dw-mshc-ddr-timing = <0 2>; pinctrl-names = "default"; - pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; + pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_wp &sd2_bus1 &sd2_bus4>; bus-width = <4>; cap-sd-highspeed; max-frequency = <200000000>;