From: Chen-Yu Tsai Date: Fri, 29 Jan 2016 17:21:48 +0000 (+0800) Subject: mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support X-Git-Tag: v4.14-rc1~3576^2~94 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=aed26fcafe786294c60e382063168a0bcea85a27;p=platform%2Fkernel%2Flinux-rpi.git mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support Now that clock delay settings for 8 bit DDR are correct, and vqmmc support is available, we can enable MMC_CAP_1_8V_DDR support. This enables MMC HS-DDR at up to 52 MHz, even if signal voltage switching is not available. Signed-off-by: Chen-Yu Tsai Reviewed-by: Hans de Goede Signed-off-by: Ulf Hansson --- diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index bb45926..2aee17c 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c @@ -1131,6 +1131,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev) mmc->f_min = 400000; mmc->f_max = 52000000; mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | + MMC_CAP_1_8V_DDR | MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ; ret = mmc_of_parse(mmc);