From: Alexandre Ganea Date: Wed, 17 Jun 2020 16:08:12 +0000 (-0400) Subject: [X86] Change signature of EmitNops. NFC. X-Git-Tag: llvmorg-12-init~2784 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ad879b31f054116a9df4efceddee967a2b6247bb;p=platform%2Fupstream%2Fllvm.git [X86] Change signature of EmitNops. NFC. This is to support https://reviews.llvm.org/D81301. --- diff --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp index 1d0df17..f966fe65 100644 --- a/llvm/lib/Target/X86/X86MCInstLower.cpp +++ b/llvm/lib/Target/X86/X86MCInstLower.cpp @@ -96,8 +96,8 @@ struct NoAutoPaddingScope { }; // Emit a minimal sequence of nops spanning NumBytes bytes. -static void EmitNops(MCStreamer &OS, unsigned NumBytes, bool Is64Bit, - const MCSubtargetInfo &STI); +static void emitX86Nops(MCStreamer &OS, unsigned NumBytes, + const X86Subtarget *Subtarget); void X86AsmPrinter::StackMapShadowTracker::count(MCInst &Inst, const MCSubtargetInfo &STI, @@ -117,8 +117,8 @@ void X86AsmPrinter::StackMapShadowTracker::emitShadowPadding( MCStreamer &OutStreamer, const MCSubtargetInfo &STI) { if (InShadow && CurrentShadowSize < RequiredShadowSize) { InShadow = false; - EmitNops(OutStreamer, RequiredShadowSize - CurrentShadowSize, - MF->getSubtarget().is64Bit(), STI); + emitX86Nops(OutStreamer, RequiredShadowSize - CurrentShadowSize, + &MF->getSubtarget()); } } @@ -1082,29 +1082,29 @@ void X86AsmPrinter::LowerTlsAddr(X86MCInstLower &MCInstLowering, /// Return the longest nop which can be efficiently decoded for the given /// target cpu. 15-bytes is the longest single NOP instruction, but some /// platforms can't decode the longest forms efficiently. -static unsigned MaxLongNopLength(const MCSubtargetInfo &STI) { +static unsigned maxLongNopLength(const X86Subtarget *Subtarget) { uint64_t MaxNopLength = 10; - if (STI.getFeatureBits()[X86::ProcIntelSLM]) + if (Subtarget->getFeatureBits()[X86::ProcIntelSLM]) MaxNopLength = 7; - else if (STI.getFeatureBits()[X86::FeatureFast15ByteNOP]) + else if (Subtarget->getFeatureBits()[X86::FeatureFast15ByteNOP]) MaxNopLength = 15; - else if (STI.getFeatureBits()[X86::FeatureFast11ByteNOP]) + else if (Subtarget->getFeatureBits()[X86::FeatureFast11ByteNOP]) MaxNopLength = 11; return MaxNopLength; } /// Emit the largest nop instruction smaller than or equal to \p NumBytes /// bytes. Return the size of nop emitted. -static unsigned EmitNop(MCStreamer &OS, unsigned NumBytes, bool Is64Bit, - const MCSubtargetInfo &STI) { - if (!Is64Bit) { +static unsigned emitNop(MCStreamer &OS, unsigned NumBytes, + const X86Subtarget *Subtarget) { + if (!Subtarget->is64Bit()) { // TODO Do additional checking if the CPU supports multi-byte nops. - OS.emitInstruction(MCInstBuilder(X86::NOOP), STI); + OS.emitInstruction(MCInstBuilder(X86::NOOP), *Subtarget); return 1; } // Cap a single nop emission at the profitable value for the target - NumBytes = std::min(NumBytes, MaxLongNopLength(STI)); + NumBytes = std::min(NumBytes, maxLongNopLength(Subtarget)); unsigned NopSize; unsigned Opc, BaseReg, ScaleVal, IndexReg, Displacement, SegmentReg; @@ -1178,10 +1178,11 @@ static unsigned EmitNop(MCStreamer &OS, unsigned NumBytes, bool Is64Bit, switch (Opc) { default: llvm_unreachable("Unexpected opcode"); case X86::NOOP: - OS.emitInstruction(MCInstBuilder(Opc), STI); + OS.emitInstruction(MCInstBuilder(Opc), *Subtarget); break; case X86::XCHG16ar: - OS.emitInstruction(MCInstBuilder(Opc).addReg(X86::AX).addReg(X86::AX), STI); + OS.emitInstruction(MCInstBuilder(Opc).addReg(X86::AX).addReg(X86::AX), + *Subtarget); break; case X86::NOOPL: case X86::NOOPW: @@ -1191,7 +1192,7 @@ static unsigned EmitNop(MCStreamer &OS, unsigned NumBytes, bool Is64Bit, .addReg(IndexReg) .addImm(Displacement) .addReg(SegmentReg), - STI); + *Subtarget); break; } assert(NopSize <= NumBytes && "We overemitted?"); @@ -1199,12 +1200,12 @@ static unsigned EmitNop(MCStreamer &OS, unsigned NumBytes, bool Is64Bit, } /// Emit the optimal amount of multi-byte nops on X86. -static void EmitNops(MCStreamer &OS, unsigned NumBytes, bool Is64Bit, - const MCSubtargetInfo &STI) { +static void emitX86Nops(MCStreamer &OS, unsigned NumBytes, + const X86Subtarget *Subtarget) { unsigned NopsToEmit = NumBytes; (void)NopsToEmit; while (NumBytes) { - NumBytes -= EmitNop(OS, NumBytes, Is64Bit, STI); + NumBytes -= emitNop(OS, NumBytes, Subtarget); assert(NopsToEmit >= NumBytes && "Emitted more than I asked for!"); } } @@ -1217,8 +1218,7 @@ void X86AsmPrinter::LowerSTATEPOINT(const MachineInstr &MI, StatepointOpers SOpers(&MI); if (unsigned PatchBytes = SOpers.getNumPatchBytes()) { - EmitNops(*OutStreamer, PatchBytes, Subtarget->is64Bit(), - getSubtargetInfo()); + emitX86Nops(*OutStreamer, PatchBytes, Subtarget); } else { // Lower call target and choose correct opcode const MachineOperand &CallTarget = SOpers.getCallTarget(); @@ -1350,8 +1350,7 @@ void X86AsmPrinter::LowerPATCHABLE_OP(const MachineInstr &MI, // bytes too, so the check on MinSize is important. MCI.setOpcode(X86::PUSH64rmr); } else { - unsigned NopSize = EmitNop(*OutStreamer, MinSize, Subtarget->is64Bit(), - getSubtargetInfo()); + unsigned NopSize = emitNop(*OutStreamer, MinSize, Subtarget); assert(NopSize == MinSize && "Could not implement MinSize!"); (void)NopSize; } @@ -1435,8 +1434,7 @@ void X86AsmPrinter::LowerPATCHPOINT(const MachineInstr &MI, assert(NumBytes >= EncodedBytes && "Patchpoint can't request size less than the length of a call."); - EmitNops(*OutStreamer, NumBytes - EncodedBytes, Subtarget->is64Bit(), - getSubtargetInfo()); + emitX86Nops(*OutStreamer, NumBytes - EncodedBytes, Subtarget); } void X86AsmPrinter::LowerPATCHABLE_EVENT_CALL(const MachineInstr &MI, @@ -1496,7 +1494,7 @@ void X86AsmPrinter::LowerPATCHABLE_EVENT_CALL(const MachineInstr &MI, EmitAndCountInstruction( MCInstBuilder(X86::PUSH64r).addReg(DestRegs[I])); } else { - EmitNops(*OutStreamer, 4, Subtarget->is64Bit(), getSubtargetInfo()); + emitX86Nops(*OutStreamer, 4, Subtarget); } } @@ -1525,7 +1523,7 @@ void X86AsmPrinter::LowerPATCHABLE_EVENT_CALL(const MachineInstr &MI, if (UsedMask[I]) EmitAndCountInstruction(MCInstBuilder(X86::POP64r).addReg(DestRegs[I])); else - EmitNops(*OutStreamer, 1, Subtarget->is64Bit(), getSubtargetInfo()); + emitX86Nops(*OutStreamer, 1, Subtarget); OutStreamer->AddComment("xray custom event end."); @@ -1594,7 +1592,7 @@ void X86AsmPrinter::LowerPATCHABLE_TYPED_EVENT_CALL(const MachineInstr &MI, EmitAndCountInstruction( MCInstBuilder(X86::PUSH64r).addReg(DestRegs[I])); } else { - EmitNops(*OutStreamer, 4, Subtarget->is64Bit(), getSubtargetInfo()); + emitX86Nops(*OutStreamer, 4, Subtarget); } } @@ -1628,7 +1626,7 @@ void X86AsmPrinter::LowerPATCHABLE_TYPED_EVENT_CALL(const MachineInstr &MI, if (UsedMask[I]) EmitAndCountInstruction(MCInstBuilder(X86::POP64r).addReg(DestRegs[I])); else - EmitNops(*OutStreamer, 1, Subtarget->is64Bit(), getSubtargetInfo()); + emitX86Nops(*OutStreamer, 1, Subtarget); OutStreamer->AddComment("xray typed event end."); @@ -1648,7 +1646,7 @@ void X86AsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI, .getValueAsString() .getAsInteger(10, Num)) return; - EmitNops(*OutStreamer, Num, Subtarget->is64Bit(), getSubtargetInfo()); + emitX86Nops(*OutStreamer, Num, Subtarget); return; } // We want to emit the following pattern: @@ -1672,7 +1670,7 @@ void X86AsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI, // an operand (computed as an offset from the jmp instruction). // FIXME: Find another less hacky way do force the relative jump. OutStreamer->emitBytes("\xeb\x09"); - EmitNops(*OutStreamer, 9, Subtarget->is64Bit(), getSubtargetInfo()); + emitX86Nops(*OutStreamer, 9, Subtarget); recordSled(CurSled, MI, SledKind::FUNCTION_ENTER, 2); } @@ -1704,7 +1702,7 @@ void X86AsmPrinter::LowerPATCHABLE_RET(const MachineInstr &MI, if (auto MaybeOperand = MCIL.LowerMachineOperand(&MI, MO)) Ret.addOperand(MaybeOperand.getValue()); OutStreamer->emitInstruction(Ret, getSubtargetInfo()); - EmitNops(*OutStreamer, 10, Subtarget->is64Bit(), getSubtargetInfo()); + emitX86Nops(*OutStreamer, 10, Subtarget); recordSled(CurSled, MI, SledKind::FUNCTION_EXIT, 2); } @@ -1727,7 +1725,7 @@ void X86AsmPrinter::LowerPATCHABLE_TAIL_CALL(const MachineInstr &MI, // an operand (computed as an offset from the jmp instruction). // FIXME: Find another less hacky way do force the relative jump. OutStreamer->emitBytes("\xeb\x09"); - EmitNops(*OutStreamer, 9, Subtarget->is64Bit(), getSubtargetInfo()); + emitX86Nops(*OutStreamer, 9, Subtarget); OutStreamer->emitLabel(Target); recordSled(CurSled, MI, SledKind::TAIL_CALL, 2);