From: Jan Hubicka Date: Sun, 12 Sep 2004 23:31:31 +0000 (+0200) Subject: i386.c (x86_schedule): New global variable. X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ad7b96a93d7cf1128251e8504bcb6c7209b2b4f8;p=platform%2Fupstream%2Fgcc.git i386.c (x86_schedule): New global variable. * i386.c (x86_schedule): New global variable. (override_options): Disable scheduling when not supported. * i386.h (x86_schedule): Declare. (TARGET_SCHEDULE): New macro. From-SVN: r87411 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 95f1545..67d42f8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2004-09-13 Jan Hubicka + + * i386.c (x86_schedule): New global variable. + (override_options): Disable scheduling when not supported. + * i386.h (x86_schedule): Declare. + (TARGET_SCHEDULE): New macro. + 2004-09-12 Richard Henderson PR c++/16254 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index c191109..75935ab 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -578,6 +578,7 @@ const int x86_ext_80387_constants = m_K6 | m_ATHLON | m_PENT4 | m_NOCONA | m_PPR /* Some CPU cores are not able to predict more than 4 branch instructions in the 16 byte window. */ const int x86_four_jump_limit = m_PPRO | m_ATHLON_K8 | m_PENT4 | m_NOCONA; +const int x86_schedule = m_PPRO | m_ATHLON_K8 | m_K8 | m_PENT; /* In case the average insn count for single function invocation is lower than this constant, emit fast (but longer) prologue and @@ -1565,6 +1566,10 @@ override_options (void) internal_label_prefix_len = p - internal_label_prefix; *p = '\0'; } + /* When scheduling description is not available, disable scheduler pass so it + won't slow down the compilation and make x87 code slower. */ + if (!TARGET_SCHEDULE) + flag_schedule_insns_after_reload = flag_schedule_insns = 0; } void diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index e326848..e3c6d1b 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -243,7 +243,7 @@ extern const int x86_arch_always_fancy_math_387, x86_shift1; extern const int x86_sse_partial_reg_dependency, x86_sse_partial_regs; extern const int x86_sse_typeless_stores, x86_sse_load0_by_pxor; extern const int x86_use_ffreep, x86_sse_partial_regs_for_cvtsd2ss; -extern const int x86_inter_unit_moves; +extern const int x86_inter_unit_moves, x86_schedule; extern int x86_prefetch_sse; #define TARGET_USE_LEAVE (x86_use_leave & TUNEMASK) @@ -298,6 +298,7 @@ extern int x86_prefetch_sse; #define TARGET_REP_MOVL_OPTIMAL (x86_rep_movl_optimal & TUNEMASK) #define TARGET_INTER_UNIT_MOVES (x86_inter_unit_moves & TUNEMASK) #define TARGET_FOUR_JUMP_LIMIT (x86_four_jump_limit & TUNEMASK) +#define TARGET_SCHEDULE (x86_schedule & TUNEMASK) #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)