From: Roman Lebedev Date: Wed, 18 Jul 2018 08:15:13 +0000 (+0000) Subject: Revert test changes part of "Revert "[InstCombine] Fold 'check for [no] signed trunca... X-Git-Tag: llvmorg-7.0.0-rc1~1171 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ad50ae82ad4dafefdaf0779258bf164d5687e984;p=platform%2Fupstream%2Fllvm.git Revert test changes part of "Revert "[InstCombine] Fold 'check for [no] signed truncation' pattern"" We want the test to remain good anyway. I think the fix is incoming. This reverts part of commit rL337344. llvm-svn: 337359 --- diff --git a/llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll b/llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll index 4f324f9..5ed2229 100644 --- a/llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll +++ b/llvm/test/Transforms/InstCombine/canonicalize-lack-of-signed-truncation-check.ll @@ -15,13 +15,13 @@ define i1 @p0(i8 %x) { ; CHECK-LABEL: @p0( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp0 = shl i8 %x, 5 + %tmp1 = ashr exact i8 %tmp0, 5 %tmp2 = icmp eq i8 %tmp1, %x ret i1 %tmp2 } @@ -32,65 +32,65 @@ define i1 @p0(i8 %x) { define <2 x i1> @p1_vec_splat(<2 x i8> %x) { ; CHECK-LABEL: @p1_vec_splat( -; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; - %tmp0 = shl <2 x i8> %x, - %tmp1 = ashr exact <2 x i8> %tmp0, + %tmp0 = shl <2 x i8> %x, + %tmp1 = ashr exact <2 x i8> %tmp0, %tmp2 = icmp eq <2 x i8> %tmp1, %x ret <2 x i1> %tmp2 } define <2 x i1> @p2_vec_nonsplat(<2 x i8> %x) { ; CHECK-LABEL: @p2_vec_nonsplat( -; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; - %tmp0 = shl <2 x i8> %x, - %tmp1 = ashr exact <2 x i8> %tmp0, + %tmp0 = shl <2 x i8> %x, + %tmp1 = ashr exact <2 x i8> %tmp0, %tmp2 = icmp eq <2 x i8> %tmp1, %x ret <2 x i1> %tmp2 } define <3 x i1> @p3_vec_undef0(<3 x i8> %x) { ; CHECK-LABEL: @p3_vec_undef0( -; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <3 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <3 x i1> [[TMP2]] ; - %tmp0 = shl <3 x i8> %x, - %tmp1 = ashr exact <3 x i8> %tmp0, + %tmp0 = shl <3 x i8> %x, + %tmp1 = ashr exact <3 x i8> %tmp0, %tmp2 = icmp eq <3 x i8> %tmp1, %x ret <3 x i1> %tmp2 } define <3 x i1> @p4_vec_undef1(<3 x i8> %x) { ; CHECK-LABEL: @p4_vec_undef1( -; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <3 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <3 x i1> [[TMP2]] ; - %tmp0 = shl <3 x i8> %x, - %tmp1 = ashr exact <3 x i8> %tmp0, + %tmp0 = shl <3 x i8> %x, + %tmp1 = ashr exact <3 x i8> %tmp0, %tmp2 = icmp eq <3 x i8> %tmp1, %x ret <3 x i1> %tmp2 } define <3 x i1> @p5_vec_undef2(<3 x i8> %x) { ; CHECK-LABEL: @p5_vec_undef2( -; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <3 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <3 x i1> [[TMP2]] ; - %tmp0 = shl <3 x i8> %x, - %tmp1 = ashr exact <3 x i8> %tmp0, + %tmp0 = shl <3 x i8> %x, + %tmp1 = ashr exact <3 x i8> %tmp0, %tmp2 = icmp eq <3 x i8> %tmp1, %x ret <3 x i1> %tmp2 } @@ -104,14 +104,14 @@ declare i8 @gen8() define i1 @c0() { ; CHECK-LABEL: @c0( ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8() -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X]], 4 -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X]], 5 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[X]], [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP2]] ; %x = call i8 @gen8() - %tmp0 = shl i8 %x, 4 - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp0 = shl i8 %x, 5 + %tmp1 = ashr exact i8 %tmp0, 5 %tmp2 = icmp eq i8 %x, %tmp1 ; swapped order ret i1 %tmp2 } @@ -124,29 +124,29 @@ declare void @use8(i8) define i1 @n_oneuse0(i8 %x) { ; CHECK-LABEL: @n_oneuse0( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 ; CHECK-NEXT: call void @use8(i8 [[TMP0]]) -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 + %tmp0 = shl i8 %x, 5 call void @use8(i8 %tmp0) - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp1 = ashr exact i8 %tmp0, 5 %tmp2 = icmp eq i8 %tmp1, %x ret i1 %tmp2 } define i1 @n_oneuse1(i8 %x) { ; CHECK-LABEL: @n_oneuse1( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: call void @use8(i8 [[TMP1]]) ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp0 = shl i8 %x, 5 + %tmp1 = ashr exact i8 %tmp0, 5 call void @use8(i8 %tmp1) %tmp2 = icmp eq i8 %tmp1, %x ret i1 %tmp2 @@ -154,16 +154,16 @@ define i1 @n_oneuse1(i8 %x) { define i1 @n_oneuse2(i8 %x) { ; CHECK-LABEL: @n_oneuse2( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 ; CHECK-NEXT: call void @use8(i8 [[TMP0]]) -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: call void @use8(i8 [[TMP1]]) ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 + %tmp0 = shl i8 %x, 5 call void @use8(i8 %tmp0) - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp1 = ashr exact i8 %tmp0, 5 call void @use8(i8 %tmp1) %tmp2 = icmp eq i8 %tmp1, %x ret i1 %tmp2 @@ -175,50 +175,50 @@ define i1 @n_oneuse2(i8 %x) { define i1 @n0(i8 %x) { ; CHECK-LABEL: @n0( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 3 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[X]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 - %tmp1 = ashr exact i8 %tmp0, 3 ; not 4 + %tmp0 = shl i8 %x, 5 + %tmp1 = ashr exact i8 %tmp0, 3 ; not 5 %tmp2 = icmp eq i8 %tmp1, %x ret i1 %tmp2 } define i1 @n1(i8 %x) { ; CHECK-LABEL: @n1( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[X:%.*]], 16 +; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[X:%.*]], 8 ; CHECK-NEXT: ret i1 [[TMP1]] ; - %tmp0 = shl i8 %x, 4 - %tmp1 = lshr exact i8 %tmp0, 4 ; not ashr + %tmp0 = shl i8 %x, 5 + %tmp1 = lshr exact i8 %tmp0, 5 ; not ashr %tmp2 = icmp eq i8 %tmp1, %x ret i1 %tmp2 } define i1 @n2(i8 %x, i8 %y) { ; CHECK-LABEL: @n2( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], [[Y:%.*]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp0 = shl i8 %x, 5 + %tmp1 = ashr exact i8 %tmp0, 5 %tmp2 = icmp eq i8 %tmp1, %y ; not %x ret i1 %tmp2 } define <2 x i1> @n3_vec_nonsplat(<2 x i8> %x) { ; CHECK-LABEL: @n3_vec_nonsplat( -; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; - %tmp0 = shl <2 x i8> %x, - %tmp1 = ashr exact <2 x i8> %tmp0, ; 3 instead of 4 + %tmp0 = shl <2 x i8> %x, + %tmp1 = ashr exact <2 x i8> %tmp0, ; 3 instead of 5 %tmp2 = icmp eq <2 x i8> %tmp1, %x ret <2 x i1> %tmp2 } diff --git a/llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll b/llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll index f1a5034..ca08a33 100644 --- a/llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll +++ b/llvm/test/Transforms/InstCombine/canonicalize-signed-truncation-check.ll @@ -15,13 +15,13 @@ define i1 @p0(i8 %x) { ; CHECK-LABEL: @p0( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp0 = shl i8 %x, 5 + %tmp1 = ashr exact i8 %tmp0, 5 %tmp2 = icmp ne i8 %tmp1, %x ret i1 %tmp2 } @@ -32,65 +32,65 @@ define i1 @p0(i8 %x) { define <2 x i1> @p1_vec_splat(<2 x i8> %x) { ; CHECK-LABEL: @p1_vec_splat( -; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; - %tmp0 = shl <2 x i8> %x, - %tmp1 = ashr exact <2 x i8> %tmp0, + %tmp0 = shl <2 x i8> %x, + %tmp1 = ashr exact <2 x i8> %tmp0, %tmp2 = icmp ne <2 x i8> %tmp1, %x ret <2 x i1> %tmp2 } define <2 x i1> @p2_vec_nonsplat(<2 x i8> %x) { ; CHECK-LABEL: @p2_vec_nonsplat( -; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; - %tmp0 = shl <2 x i8> %x, - %tmp1 = ashr exact <2 x i8> %tmp0, + %tmp0 = shl <2 x i8> %x, + %tmp1 = ashr exact <2 x i8> %tmp0, %tmp2 = icmp ne <2 x i8> %tmp1, %x ret <2 x i1> %tmp2 } define <3 x i1> @p3_vec_undef0(<3 x i8> %x) { ; CHECK-LABEL: @p3_vec_undef0( -; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <3 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <3 x i1> [[TMP2]] ; - %tmp0 = shl <3 x i8> %x, - %tmp1 = ashr exact <3 x i8> %tmp0, + %tmp0 = shl <3 x i8> %x, + %tmp1 = ashr exact <3 x i8> %tmp0, %tmp2 = icmp ne <3 x i8> %tmp1, %x ret <3 x i1> %tmp2 } define <3 x i1> @p4_vec_undef1(<3 x i8> %x) { ; CHECK-LABEL: @p4_vec_undef1( -; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <3 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <3 x i1> [[TMP2]] ; - %tmp0 = shl <3 x i8> %x, - %tmp1 = ashr exact <3 x i8> %tmp0, + %tmp0 = shl <3 x i8> %x, + %tmp1 = ashr exact <3 x i8> %tmp0, %tmp2 = icmp ne <3 x i8> %tmp1, %x ret <3 x i1> %tmp2 } define <3 x i1> @p5_vec_undef2(<3 x i8> %x) { ; CHECK-LABEL: @p5_vec_undef2( -; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <3 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <3 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <3 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <3 x i1> [[TMP2]] ; - %tmp0 = shl <3 x i8> %x, - %tmp1 = ashr exact <3 x i8> %tmp0, + %tmp0 = shl <3 x i8> %x, + %tmp1 = ashr exact <3 x i8> %tmp0, %tmp2 = icmp ne <3 x i8> %tmp1, %x ret <3 x i1> %tmp2 } @@ -104,14 +104,14 @@ declare i8 @gen8() define i1 @c0() { ; CHECK-LABEL: @c0( ; CHECK-NEXT: [[X:%.*]] = call i8 @gen8() -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X]], 4 -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X]], 5 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[X]], [[TMP1]] ; CHECK-NEXT: ret i1 [[TMP2]] ; %x = call i8 @gen8() - %tmp0 = shl i8 %x, 4 - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp0 = shl i8 %x, 5 + %tmp1 = ashr exact i8 %tmp0, 5 %tmp2 = icmp ne i8 %x, %tmp1 ; swapped order ret i1 %tmp2 } @@ -124,29 +124,29 @@ declare void @use8(i8) define i1 @n_oneuse0(i8 %x) { ; CHECK-LABEL: @n_oneuse0( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 ; CHECK-NEXT: call void @use8(i8 [[TMP0]]) -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 + %tmp0 = shl i8 %x, 5 call void @use8(i8 %tmp0) - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp1 = ashr exact i8 %tmp0, 5 %tmp2 = icmp ne i8 %tmp1, %x ret i1 %tmp2 } define i1 @n_oneuse1(i8 %x) { ; CHECK-LABEL: @n_oneuse1( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: call void @use8(i8 [[TMP1]]) ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp0 = shl i8 %x, 5 + %tmp1 = ashr exact i8 %tmp0, 5 call void @use8(i8 %tmp1) %tmp2 = icmp ne i8 %tmp1, %x ret i1 %tmp2 @@ -154,16 +154,16 @@ define i1 @n_oneuse1(i8 %x) { define i1 @n_oneuse2(i8 %x) { ; CHECK-LABEL: @n_oneuse2( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 ; CHECK-NEXT: call void @use8(i8 [[TMP0]]) -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: call void @use8(i8 [[TMP1]]) ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 + %tmp0 = shl i8 %x, 5 call void @use8(i8 %tmp0) - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp1 = ashr exact i8 %tmp0, 5 call void @use8(i8 %tmp1) %tmp2 = icmp ne i8 %tmp1, %x ret i1 %tmp2 @@ -175,50 +175,50 @@ define i1 @n_oneuse2(i8 %x) { define i1 @n0(i8 %x) { ; CHECK-LABEL: @n0( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 ; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 3 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[X]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 - %tmp1 = ashr exact i8 %tmp0, 3 ; not 4 + %tmp0 = shl i8 %x, 5 + %tmp1 = ashr exact i8 %tmp0, 3 ; not 5 %tmp2 = icmp ne i8 %tmp1, %x ret i1 %tmp2 } define i1 @n1(i8 %x) { ; CHECK-LABEL: @n1( -; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], 15 +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], 7 ; CHECK-NEXT: ret i1 [[TMP1]] ; - %tmp0 = shl i8 %x, 4 - %tmp1 = lshr exact i8 %tmp0, 4 ; not ashr + %tmp0 = shl i8 %x, 5 + %tmp1 = lshr exact i8 %tmp0, 5 ; not ashr %tmp2 = icmp ne i8 %tmp1, %x ret i1 %tmp2 } define i1 @n2(i8 %x, i8 %y) { ; CHECK-LABEL: @n2( -; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 4 -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 4 +; CHECK-NEXT: [[TMP0:%.*]] = shl i8 [[X:%.*]], 5 +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact i8 [[TMP0]], 5 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], [[Y:%.*]] ; CHECK-NEXT: ret i1 [[TMP2]] ; - %tmp0 = shl i8 %x, 4 - %tmp1 = ashr exact i8 %tmp0, 4 + %tmp0 = shl i8 %x, 5 + %tmp1 = ashr exact i8 %tmp0, 5 %tmp2 = icmp ne i8 %tmp1, %y ; not %x ret i1 %tmp2 } define <2 x i1> @n3_vec_nonsplat(<2 x i8> %x) { ; CHECK-LABEL: @n3_vec_nonsplat( -; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], -; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], +; CHECK-NEXT: [[TMP0:%.*]] = shl <2 x i8> [[X:%.*]], +; CHECK-NEXT: [[TMP1:%.*]] = ashr exact <2 x i8> [[TMP0]], ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <2 x i8> [[TMP1]], [[X]] ; CHECK-NEXT: ret <2 x i1> [[TMP2]] ; - %tmp0 = shl <2 x i8> %x, - %tmp1 = ashr exact <2 x i8> %tmp0, ; 3 instead of 4 + %tmp0 = shl <2 x i8> %x, + %tmp1 = ashr exact <2 x i8> %tmp0, ; 3 instead of 5 %tmp2 = icmp ne <2 x i8> %tmp1, %x ret <2 x i1> %tmp2 }