From: Richard Biener <rguenther@suse.de>
Date: Tue, 27 Apr 2021 07:41:38 +0000 (+0200)
Subject: tree-optimization/100278 - handle mismatched code in TBAA adjust of PRE
X-Git-Tag: upstream/12.2.0~8556
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=acfe5290406cc70485df8899d14982278a9371f8;p=platform%2Fupstream%2Fgcc.git

tree-optimization/100278 - handle mismatched code in TBAA adjust of PRE

PRE has code to adjust TBAA behavior for refs that expects the base
operation code to match.  The testcase shows a case where we have
a VAR_DECL vs. a MEM_REF so add code to give up in such cases.

2021-04-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100278
	* tree-ssa-pre.c (compute_avail): Give up when we cannot
	adjust TBAA beacuse of mismatching bases.

	* gcc.dg/tree-ssa/pr100278.c: New testcase.
---

diff --git a/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c b/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c
new file mode 100644
index 0000000..8d70228
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/tree-ssa/pr100278.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+void a()
+{
+#if defined __s390__
+  register int b asm("r5");
+#elif defined __x86_64__
+  register int b asm("eax");
+#else
+  volatile int b;
+#endif
+  if (b)
+    b = 1;
+  for (; b;)
+    ;
+}
diff --git a/gcc/tree-ssa-pre.c b/gcc/tree-ssa-pre.c
index 2803b58..2d22535 100644
--- a/gcc/tree-ssa-pre.c
+++ b/gcc/tree-ssa-pre.c
@@ -4151,6 +4151,16 @@ compute_avail (void)
 		      if (ref->set == set
 			  || alias_set_subset_of (set, ref->set))
 			;
+		      else if (ref1->opcode != ref2->opcode
+			       || (ref1->opcode != MEM_REF
+				   && ref1->opcode != TARGET_MEM_REF))
+			{
+			  /* With mismatching base opcodes or bases
+			     other than MEM_REF or TARGET_MEM_REF we
+			     can't do any easy TBAA adjustment.  */
+			  operands.release ();
+			  continue;
+			}
 		      else if (alias_set_subset_of (ref->set, set))
 			{
 			  ref->set = set;