From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Thu, 17 Dec 2020 00:53:54 +0000 (-0800)
Subject: Merge tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel... 
X-Git-Tag: v5.15~2142
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=accefff5b547a9a1d959c7e76ad539bf2480e78b;p=platform%2Fkernel%2Flinux-starfive.git

Merge tag 'arm-soc-omap-genpd-5.11' of git://git./linux/kernel/git/soc/soc

Pull ARM SoC OMAP GenPD updates from Arnd Bergmann:
 "These are additional updates for the power domain support on OMAP,
  moving to an implementation based on device tree information instead
  of SoC specific code. This is the latest step in the ongoing process
  for moving code out of arch/arm/mach-omap2.

  I kept this separate from the other driver changes since it touches
  code in multiple areas"

* tag 'arm-soc-omap-genpd-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (51 commits)
  ARM: OMAP2+: Fix am4 only build after genpd changes
  ARM: dts: Configure power domain for omap5 dss
  ARM: dts: omap5: add remaining PRM instances
  soc: ti: omap-prm: omap5: add genpd support for remaining PRM instances
  ARM: OMAP2+: Drop legacy platform data for dra7 gpmc
  ARM: dts: Configure interconnect target module for dra7 iva
  ARM: dts: dra7: add remaining PRM instances
  soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances
  clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks
  ARM: OMAP2+: Drop legacy platform data for omap4 gpmc
  ARM: OMAP2+: Drop legacy platform data for omap4 iva
  ARM: dts: Configure power domain for omap4 dsp
  ARM: dts: Configure power domain for omap4 dss
  ARM: dts: omap4: add remaining PRM instances
  soc: ti: omap-prm: omap4: add genpd support for remaining PRM instances
  clk: ti: omap4: Drop idlest polling from IVA clkctrl clocks
  ARM: OMAP2+: Drop legacy remaining legacy platform data for am4
  ARM: dts: Use simple-pm-bus for genpd for am4 l3
  ARM: dts: Move am4 l3 noc to a separate node
  ARM: dts: Use simple-pm-bus for genpd for am4 l4_per
  ...
---

accefff5b547a9a1d959c7e76ad539bf2480e78b
diff --cc arch/arm/boot/dts/dra7.dtsi
index 6ba6a1b,5508a7f..ce11947
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@@ -962,36 -980,32 +980,62 @@@
  			};
  		};
  
 +		sham2_target: target-module@42701000 {
 +			compatible = "ti,sysc-omap3-sham", "ti,sysc";
 +			reg = <0x42701100 0x4>,
 +			      <0x42701110 0x4>,
 +			      <0x42701114 0x4>;
 +			reg-names = "rev", "sysc", "syss";
 +			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
 +					 SYSC_OMAP2_AUTOIDLE)>;
 +			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
 +					<SYSC_IDLE_NO>,
 +					<SYSC_IDLE_SMART>;
 +			ti,syss-mask = <1>;
 +			/* Domains (P, C): l4per_pwrdm, l4sec_clkdm */
 +			clocks = <&l4sec_clkctrl DRA7_L4SEC_SHAM2_CLKCTRL 0>;
 +			clock-names = "fck";
 +			#address-cells = <1>;
 +			#size-cells = <1>;
 +			ranges = <0x0 0x42701000 0x1000>;
 +
 +			sham2: sham@0 {
 +				compatible = "ti,omap5-sham";
 +				reg = <0 0x300>;
 +				interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 +				dmas = <&edma_xbar 165 0>;
 +				dma-names = "rx";
 +				clocks = <&l3_iclk_div>;
 +				clock-names = "fck";
 +			};
 +		};
 +
+ 		iva_hd_target: target-module@5a000000 {
+ 			compatible = "ti,sysc-omap4", "ti,sysc";
+ 			reg = <0x5a05a400 0x4>,
+ 			      <0x5a05a410 0x4>;
+ 			reg-names = "rev", "sysc";
+ 			ti,sysc-midle = <SYSC_IDLE_FORCE>,
+ 					<SYSC_IDLE_NO>,
+ 					<SYSC_IDLE_SMART>;
+ 			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ 					<SYSC_IDLE_NO>,
+ 					<SYSC_IDLE_SMART>;
+ 			power-domains = <&prm_iva>;
+ 			resets = <&prm_iva 2>;
+ 			reset-names = "rstctrl";
+ 			clocks = <&iva_clkctrl DRA7_IVA_CLKCTRL 0>;
+ 			clock-names = "fck";
+ 			#address-cells = <1>;
+ 			#size-cells = <1>;
+ 			ranges = <0x5a000000 0x5a000000 0x1000000>,
+ 				 <0x5b000000 0x5b000000 0x1000000>;
+ 
+ 			iva {
+ 				compatible = "ti,ivahd";
+ 			};
+ 		};
+ 
  		opp_supply_mpu: opp-supply@4a003b20 {
  			compatible = "ti,omap5-opp-supply";
  			reg = <0x4a003b20 0xc>;