From: Francisco Jerez <currojerez@riseup.net>
Date: Fri, 30 Sep 2022 01:04:56 +0000 (-0700)
Subject: intel/fs/xe2+: Update regioning lowering offset alignment checks for Xe2 regs.
X-Git-Tag: upstream/23.3.3~1786
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ac4f5985773dfdc8fa30e92a2e018e72ad86c475;p=platform%2Fupstream%2Fmesa.git

intel/fs/xe2+: Update regioning lowering offset alignment checks for Xe2 regs.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25020>
---

diff --git a/src/intel/compiler/brw_fs_lower_regioning.cpp b/src/intel/compiler/brw_fs_lower_regioning.cpp
index 398fe64..a2c04e3 100644
--- a/src/intel/compiler/brw_fs_lower_regioning.cpp
+++ b/src/intel/compiler/brw_fs_lower_regioning.cpp
@@ -107,16 +107,16 @@ namespace {
     * the sources.
     */
    unsigned
-   required_dst_byte_offset(const fs_inst *inst)
+   required_dst_byte_offset(const intel_device_info *devinfo, const fs_inst *inst)
    {
       for (unsigned i = 0; i < inst->sources; i++) {
          if (!is_uniform(inst->src[i]) && !inst->is_control_source(i))
-            if (reg_offset(inst->src[i]) % REG_SIZE !=
-                reg_offset(inst->dst) % REG_SIZE)
+            if (reg_offset(inst->src[i]) % (reg_unit(devinfo) * REG_SIZE) !=
+                reg_offset(inst->dst) % (reg_unit(devinfo) * REG_SIZE))
                return 0;
       }
 
-      return reg_offset(inst->dst) % REG_SIZE;
+      return reg_offset(inst->dst) % (reg_unit(devinfo) * REG_SIZE);
    }
 
    /*
@@ -274,8 +274,8 @@ namespace {
          return true;
       }
 
-      const unsigned dst_byte_offset = reg_offset(inst->dst) % REG_SIZE;
-      const unsigned src_byte_offset = reg_offset(inst->src[i]) % REG_SIZE;
+      const unsigned dst_byte_offset = reg_offset(inst->dst) % (reg_unit(devinfo) * REG_SIZE);
+      const unsigned src_byte_offset = reg_offset(inst->src[i]) % (reg_unit(devinfo) * REG_SIZE);
 
       return has_dst_aligned_region_restriction(devinfo, inst) &&
              !is_uniform(inst->src[i]) &&
@@ -295,13 +295,13 @@ namespace {
          return false;
       } else {
          const brw_reg_type exec_type = get_exec_type(inst);
-         const unsigned dst_byte_offset = reg_offset(inst->dst) % REG_SIZE;
+         const unsigned dst_byte_offset = reg_offset(inst->dst) % (reg_unit(devinfo) * REG_SIZE);
          const bool is_narrowing_conversion = !is_byte_raw_mov(inst) &&
             type_sz(inst->dst.type) < type_sz(exec_type);
 
          return (has_dst_aligned_region_restriction(devinfo, inst) &&
                  (required_dst_byte_stride(inst) != byte_stride(inst->dst) ||
-                  required_dst_byte_offset(inst) != dst_byte_offset)) ||
+                  required_dst_byte_offset(devinfo, inst) != dst_byte_offset)) ||
                 (is_narrowing_conversion &&
                  required_dst_byte_stride(inst) != byte_stride(inst->dst));
       }