From: Ilia Mirkin Date: Tue, 4 Jul 2017 21:43:15 +0000 (-0400) Subject: a5xx: enable polygon mode selection X-Git-Tag: upstream/18.1.0~8077 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=abe8740e337e7a4b0b9a340506799362d356e6ef;p=platform%2Fupstream%2Fmesa.git a5xx: enable polygon mode selection Signed-off-by: Ilia Mirkin Acked-by: Rob Clark --- diff --git a/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h b/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h index 08980c1..b3306a5 100644 --- a/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h +++ b/src/gallium/drivers/freedreno/a5xx/a5xx.xml.h @@ -8,7 +8,7 @@ http://github.com/freedreno/envytools/ git clone https://github.com/freedreno/envytools.git The rules-ng-ng source files this header was generated from are: -- /home/ilia/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 141292 bytes, from 2017-07-04 16:29:34) +- /home/ilia/src/freedreno/envytools/rnndb/adreno/a5xx.xml ( 141534 bytes, from 2017-07-04 21:36:44) - /home/ilia/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1572 bytes, from 2016-02-11 01:04:14) - /home/ilia/src/freedreno/envytools/rnndb/adreno/adreno_common.xml ( 13324 bytes, from 2017-07-04 02:59:47) - /home/ilia/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml ( 31866 bytes, from 2017-07-04 02:59:47) @@ -3684,6 +3684,19 @@ static inline uint32_t A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC(uint32_t val) #define A5XX_PC_PRIM_VTX_CNTL_PSIZE 0x00000800 #define REG_A5XX_PC_RASTER_CNTL 0x0000e388 +#define A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__MASK 0x00000007 +#define A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__SHIFT 0 +static inline uint32_t A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val) +{ + return ((val) << A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__SHIFT) & A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__MASK; +} +#define A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__MASK 0x00000038 +#define A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__SHIFT 3 +static inline uint32_t A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val) +{ + return ((val) << A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__SHIFT) & A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__MASK; +} +#define A5XX_PC_RASTER_CNTL_POLYMODE_ENABLE 0x00000040 #define REG_A5XX_UNKNOWN_E389 0x0000e389 diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c index 458876b..c875365 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c @@ -604,6 +604,9 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring, OUT_RING(ring, rasterizer->pc_primitive_cntl | A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC(max_loc)); + OUT_PKT4(ring, REG_A5XX_PC_RASTER_CNTL, 1); + OUT_RING(ring, rasterizer->pc_raster_cntl); + OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); OUT_RING(ring, rasterizer->gras_cl_clip_cntl); } diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.c b/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.c index 9cba833..2bbcbf2 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.c +++ b/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.c @@ -68,13 +68,13 @@ fd5_rasterizer_state_create(struct pipe_context *pctx, so->gras_su_cntl = A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(cso->line_width/2.0); -// so->pc_prim_vtx_cntl2 = -// A5XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE(fd_polygon_mode(cso->fill_front)) | -// A5XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE(fd_polygon_mode(cso->fill_back)); + so->pc_raster_cntl = + A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE(fd_polygon_mode(cso->fill_front)) | + A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE(fd_polygon_mode(cso->fill_back)); -// if (cso->fill_front != PIPE_POLYGON_MODE_FILL || -// cso->fill_back != PIPE_POLYGON_MODE_FILL) -// so->pc_prim_vtx_cntl2 |= A5XX_PC_PRIM_VTX_CNTL2_POLYMODE_ENABLE; + if (cso->fill_front != PIPE_POLYGON_MODE_FILL || + cso->fill_back != PIPE_POLYGON_MODE_FILL) + so->pc_raster_cntl |= A5XX_PC_RASTER_CNTL_POLYMODE_ENABLE; if (cso->cull_face & PIPE_FACE_FRONT) so->gras_su_cntl |= A5XX_GRAS_SU_CNTL_CULL_FRONT; diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.h b/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.h index f02bf41..b597581 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.h +++ b/src/gallium/drivers/freedreno/a5xx/fd5_rasterizer.h @@ -42,6 +42,7 @@ struct fd5_rasterizer_stateobj { uint32_t gras_su_cntl; uint32_t gras_cl_clip_cntl; uint32_t pc_primitive_cntl; + uint32_t pc_raster_cntl; }; static inline struct fd5_rasterizer_stateobj *