From: Minkyu Kang <mk7.kang@samsung.com>
Date: Wed, 18 Aug 2010 11:54:39 +0000 (+0900)
Subject: S5P: serial: fix the source clock of uart (UCLK)
X-Git-Tag: JH02_20100820~72
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ab973c45d2a448f8690bd1c47adff209dac199c8;p=kernel%2Fu-boot.git

S5P: serial: fix the source clock of uart (UCLK)

Because of UCLK can be generated by multiple clock source,
modified from get_pclk to get_uclk.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---

diff --git a/arch/arm/cpu/armv7/s5pc1xx/clock.c b/arch/arm/cpu/armv7/s5pc1xx/clock.c
index c9b5485..35288fa 100644
--- a/arch/arm/cpu/armv7/s5pc1xx/clock.c
+++ b/arch/arm/cpu/armv7/s5pc1xx/clock.c
@@ -38,6 +38,7 @@
 #define CONFIG_SYS_CLK_FREQ_C110	24000000
 #endif
 
+unsigned long (*get_uclk)(void);
 unsigned long (*get_pclk)(void);
 unsigned long (*get_arm_clk)(void);
 unsigned long (*get_pll_clk)(int);
@@ -303,9 +304,11 @@ void s5p_clock_init(void)
 		get_pll_clk = s5pc110_get_pll_clk;
 		get_arm_clk = s5pc110_get_arm_clk;
 		get_pclk = s5pc110_get_pclk;
+		get_uclk = s5pc110_get_pclk;	/* use PCLK */
 	} else {
 		get_pll_clk = s5pc100_get_pll_clk;
 		get_arm_clk = s5pc100_get_arm_clk;
 		get_pclk = s5pc100_get_pclk;
+		get_uclk = s5pc100_get_pclk;	/* use PCLK */
 	}
 }
diff --git a/arch/arm/include/asm/arch-s5pc1xx/clk.h b/arch/arm/include/asm/arch-s5pc1xx/clk.h
index c25e17a..f52a76e 100644
--- a/arch/arm/include/asm/arch-s5pc1xx/clk.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/clk.h
@@ -34,5 +34,6 @@ void s5p_clock_init(void);
 extern unsigned long (*get_pll_clk)(int pllreg);
 extern unsigned long (*get_arm_clk)(void);
 extern unsigned long (*get_pclk)(void);
+extern unsigned long (*get_uclk)(void);
 
 #endif
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index 6a61b4f..4e46902 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -63,11 +63,11 @@ void serial_setbrg_dev(const int dev_index)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 	struct s5p_uart *const uart = s5p_get_base_uart(dev_index);
-	u32 pclk = get_pclk();
+	u32 uclk = get_uclk();
 	u32 baudrate = gd->baudrate;
 	u32 val;
 
-	val = pclk / baudrate;
+	val = uclk / baudrate;
 
 	writel(val / 16 - 1, &uart->ubrdiv);
 	writew(udivslot[val % 16], &uart->udivslot);