From: Simon Pilgrim Date: Wed, 19 Jul 2023 16:02:03 +0000 (+0100) Subject: [SLP][X86] Regenerate some test checks to reduce diff in D154891 X-Git-Tag: upstream/17.0.6~1135 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ab6ec66642623b515b264daa568fca3fb95dc7e2;p=platform%2Fupstream%2Fllvm.git [SLP][X86] Regenerate some test checks to reduce diff in D154891 --- diff --git a/llvm/test/Transforms/SLPVectorizer/X86/broadcast.ll b/llvm/test/Transforms/SLPVectorizer/X86/broadcast.ll index dc5900d..d329f33 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/broadcast.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/broadcast.ll @@ -18,11 +18,11 @@ define void @bcast_vals(ptr %A, ptr %B, ptr %S) { ; CHECK-NEXT: [[V1:%.*]] = sub i64 [[A0]], 1 ; CHECK-NEXT: [[V2:%.*]] = sub i64 [[B0]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i64> poison, i64 [[V1]], i32 0 -; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i64> [[TMP0]], <4 x i64> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i64> poison, i64 [[V2]], i32 0 -; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <4 x i64> [[TMP1]], <4 x i64> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[TMP2:%.*]] = add <4 x i64> [[SHUFFLE]], [[SHUFFLE1]] -; CHECK-NEXT: store <4 x i64> [[TMP2]], ptr [[S:%.*]], align 8 +; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i64> [[TMP0]], <4 x i64> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i64> poison, i64 [[V2]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x i64> [[TMP2]], <4 x i64> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: [[TMP4:%.*]] = add <4 x i64> [[TMP1]], [[TMP3]] +; CHECK-NEXT: store <4 x i64> [[TMP4]], ptr [[S:%.*]], align 8 ; CHECK-NEXT: ret void ; entry: @@ -71,9 +71,9 @@ define void @bcast_vals2(ptr %A, ptr %B, ptr %C, ptr %D, ptr %E, ptr %S) { ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i16> [[TMP2]], i16 [[D0]], i32 3 ; CHECK-NEXT: [[TMP4:%.*]] = sext <4 x i16> [[TMP3]] to <4 x i32> ; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> poison, i32 [[V1]], i32 0 -; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP5]], <4 x i32> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: [[TMP6:%.*]] = add <4 x i32> [[SHUFFLE]], [[TMP4]] -; CHECK-NEXT: store <4 x i32> [[TMP6]], ptr [[S:%.*]], align 8 +; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x i32> [[TMP5]], <4 x i32> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: [[TMP7:%.*]] = add <4 x i32> [[TMP6]], [[TMP4]] +; CHECK-NEXT: store <4 x i32> [[TMP7]], ptr [[S:%.*]], align 8 ; CHECK-NEXT: ret void ; entry: diff --git a/llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll b/llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll index 19d1d70..1bf9bf0 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/stacksave-dependence.ll @@ -6,10 +6,10 @@ declare i64 @may_inf_loop_ro() nounwind readonly ; Base case without allocas or stacksave define void @basecase(ptr %a, ptr %b, ptr %c) { ; CHECK-LABEL: @basecase( -; CHECK-NEXT: [[TMP2:%.*]] = load <2 x ptr>, ptr [[A:%.*]], align 8 +; CHECK-NEXT: [[TMP1:%.*]] = load <2 x ptr>, ptr [[A:%.*]], align 8 ; CHECK-NEXT: store ptr null, ptr [[A]], align 8 -; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, <2 x ptr> [[TMP2]], <2 x i32> -; CHECK-NEXT: store <2 x ptr> [[TMP3]], ptr [[B:%.*]], align 8 +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, <2 x ptr> [[TMP1]], <2 x i32> +; CHECK-NEXT: store <2 x ptr> [[TMP2]], ptr [[B:%.*]], align 8 ; CHECK-NEXT: ret void ; @@ -187,13 +187,13 @@ define void @stacksave3(ptr %a, ptr %b, ptr %c) { ; encountered during dependency scanning via the memory chain. define void @stacksave4(ptr %a, ptr %b, ptr %c) { ; CHECK-LABEL: @stacksave4( -; CHECK-NEXT: [[TMP2:%.*]] = load <2 x ptr>, ptr [[A:%.*]], align 8 -; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, <2 x ptr> [[TMP2]], <2 x i32> +; CHECK-NEXT: [[TMP1:%.*]] = load <2 x ptr>, ptr [[A:%.*]], align 8 +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, <2 x ptr> [[TMP1]], <2 x i32> ; CHECK-NEXT: [[STACK:%.*]] = call ptr @llvm.stacksave() ; CHECK-NEXT: [[X:%.*]] = alloca inalloca i8, align 1 ; CHECK-NEXT: call void @use(ptr inalloca(i8) [[X]]) #[[ATTR4]] ; CHECK-NEXT: call void @llvm.stackrestore(ptr [[STACK]]) -; CHECK-NEXT: store <2 x ptr> [[TMP3]], ptr [[B:%.*]], align 8 +; CHECK-NEXT: store <2 x ptr> [[TMP2]], ptr [[B:%.*]], align 8 ; CHECK-NEXT: ret void ; @@ -217,13 +217,13 @@ define void @stacksave4(ptr %a, ptr %b, ptr %c) { define void @stacksave5(ptr %a, ptr %b, ptr %c) { ; CHECK-LABEL: @stacksave5( -; CHECK-NEXT: [[TMP2:%.*]] = load <2 x ptr>, ptr [[A:%.*]], align 8 -; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, <2 x ptr> [[TMP2]], <2 x i32> +; CHECK-NEXT: [[TMP1:%.*]] = load <2 x ptr>, ptr [[A:%.*]], align 8 +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, <2 x ptr> [[TMP1]], <2 x i32> ; CHECK-NEXT: [[STACK:%.*]] = call ptr @llvm.stacksave() ; CHECK-NEXT: [[X:%.*]] = alloca inalloca i8, align 1 ; CHECK-NEXT: call void @use(ptr inalloca(i8) [[X]]) #[[ATTR4]] ; CHECK-NEXT: call void @llvm.stackrestore(ptr [[STACK]]) -; CHECK-NEXT: store <2 x ptr> [[TMP3]], ptr [[B:%.*]], align 8 +; CHECK-NEXT: store <2 x ptr> [[TMP2]], ptr [[B:%.*]], align 8 ; CHECK-NEXT: ret void ; @@ -303,12 +303,12 @@ define void @ham() #1 { ; CHECK-NEXT: [[VAR24:%.*]] = alloca inalloca i32, align 4 ; CHECK-NEXT: call void @quux(ptr inalloca(i32) [[VAR24]]) ; CHECK-NEXT: call void @llvm.stackrestore(ptr [[VAR23]]) -; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x ptr> poison, ptr [[VAR4]], i32 0 -; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x ptr> [[TMP2]], <4 x ptr> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: store <4 x ptr> [[SHUFFLE]], ptr [[VAR12]], align 8 -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x ptr> [[TMP2]], ptr [[VAR5]], i32 1 -; CHECK-NEXT: [[SHUFFLE1:%.*]] = shufflevector <4 x ptr> [[TMP3]], <4 x ptr> poison, <4 x i32> -; CHECK-NEXT: store <4 x ptr> [[SHUFFLE1]], ptr [[VAR36]], align 8 +; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x ptr> poison, ptr [[VAR4]], i32 0 +; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <4 x ptr> [[TMP1]], <4 x ptr> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: store <4 x ptr> [[TMP2]], ptr [[VAR12]], align 8 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x ptr> [[TMP1]], ptr [[VAR5]], i32 1 +; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x ptr> [[TMP3]], <4 x ptr> poison, <4 x i32> +; CHECK-NEXT: store <4 x ptr> [[TMP4]], ptr [[VAR36]], align 8 ; CHECK-NEXT: ret void ; %var2 = alloca i8 @@ -349,8 +349,8 @@ define void @spam() #1 { ; CHECK-NEXT: [[VAR5:%.*]] = alloca i8, align 1 ; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x ptr> poison, ptr [[VAR4]], i32 0 ; CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x ptr> [[TMP1]], ptr [[VAR5]], i32 1 -; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x ptr> [[TMP2]], <4 x ptr> poison, <4 x i32> -; CHECK-NEXT: store <4 x ptr> [[SHUFFLE]], ptr [[VAR36]], align 8 +; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <4 x ptr> [[TMP2]], <4 x ptr> poison, <4 x i32> +; CHECK-NEXT: store <4 x ptr> [[TMP3]], ptr [[VAR36]], align 8 ; CHECK-NEXT: ret void ; %var4 = alloca i8 diff --git a/llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll b/llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll index 0d6d0c2..4132ceb 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll @@ -10,8 +10,8 @@ define void @tiny_tree_fully_vectorizable(ptr noalias nocapture %dst, ptr noalia ; CHECK-NEXT: [[I_015:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[DST_ADDR_014:%.*]] = phi ptr [ [[ADD_PTR4:%.*]], [[FOR_BODY]] ], [ [[DST:%.*]], [[ENTRY]] ] ; CHECK-NEXT: [[SRC_ADDR_013:%.*]] = phi ptr [ [[ADD_PTR:%.*]], [[FOR_BODY]] ], [ [[SRC:%.*]], [[ENTRY]] ] -; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, ptr [[SRC_ADDR_013]], align 8 -; CHECK-NEXT: store <2 x double> [[TMP1]], ptr [[DST_ADDR_014]], align 8 +; CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, ptr [[SRC_ADDR_013]], align 8 +; CHECK-NEXT: store <2 x double> [[TMP0]], ptr [[DST_ADDR_014]], align 8 ; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds double, ptr [[SRC_ADDR_013]], i64 [[I_015]] ; CHECK-NEXT: [[ADD_PTR4]] = getelementptr inbounds double, ptr [[DST_ADDR_014]], i64 [[I_015]] ; CHECK-NEXT: [[INC]] = add i64 [[I_015]], 1 @@ -53,8 +53,8 @@ define void @tiny_tree_fully_vectorizable2(ptr noalias nocapture %dst, ptr noali ; CHECK-NEXT: [[I_023:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ] ; CHECK-NEXT: [[DST_ADDR_022:%.*]] = phi ptr [ [[ADD_PTR8:%.*]], [[FOR_BODY]] ], [ [[DST:%.*]], [[ENTRY]] ] ; CHECK-NEXT: [[SRC_ADDR_021:%.*]] = phi ptr [ [[ADD_PTR:%.*]], [[FOR_BODY]] ], [ [[SRC:%.*]], [[ENTRY]] ] -; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, ptr [[SRC_ADDR_021]], align 4 -; CHECK-NEXT: store <4 x float> [[TMP1]], ptr [[DST_ADDR_022]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, ptr [[SRC_ADDR_021]], align 4 +; CHECK-NEXT: store <4 x float> [[TMP0]], ptr [[DST_ADDR_022]], align 4 ; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds float, ptr [[SRC_ADDR_021]], i64 [[I_023]] ; CHECK-NEXT: [[ADD_PTR8]] = getelementptr inbounds float, ptr [[DST_ADDR_022]], i64 [[I_023]] ; CHECK-NEXT: [[INC]] = add i64 [[I_023]], 1 @@ -157,12 +157,12 @@ define void @tiny_tree_not_fully_vectorizable2(ptr noalias nocapture %dst, ptr n ; CHECK-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[SRC_ADDR_021]], i64 2 ; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[SRC_ADDR_021]], align 4 ; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[ARRAYIDX2]], align 4 -; CHECK-NEXT: [[TMP3:%.*]] = load <2 x float>, ptr [[ARRAYIDX4]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i32 0 -; CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x float> [[TMP4]], float [[TMP1]], i32 1 -; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <2 x float> [[TMP3]], <2 x float> poison, <4 x i32> -; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x float> [[TMP5]], <4 x float> [[TMP6]], <4 x i32> -; CHECK-NEXT: store <4 x float> [[TMP7]], ptr [[DST_ADDR_022]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load <2 x float>, ptr [[ARRAYIDX4]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[TMP0]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> [[TMP3]], float [[TMP1]], i32 1 +; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <2 x float> [[TMP2]], <2 x float> poison, <4 x i32> +; CHECK-NEXT: [[TMP6:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> [[TMP5]], <4 x i32> +; CHECK-NEXT: store <4 x float> [[TMP6]], ptr [[DST_ADDR_022]], align 4 ; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds float, ptr [[SRC_ADDR_021]], i64 [[I_023]] ; CHECK-NEXT: [[ADD_PTR8]] = getelementptr inbounds float, ptr [[DST_ADDR_022]], i64 [[I_023]] ; CHECK-NEXT: [[INC]] = add i64 [[I_023]], 1 @@ -205,9 +205,9 @@ for.end: ; preds = %for.body, %entry define void @store_splat(ptr, float) { ; CHECK-LABEL: @store_splat( -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x float> poison, float [[TMP1:%.*]], i32 0 -; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <4 x float> [[TMP4]], <4 x float> poison, <4 x i32> zeroinitializer -; CHECK-NEXT: store <4 x float> [[SHUFFLE]], ptr [[TMP0:%.*]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[TMP1:%.*]], i32 0 +; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> poison, <4 x i32> zeroinitializer +; CHECK-NEXT: store <4 x float> [[TMP4]], ptr [[TMP0:%.*]], align 4 ; CHECK-NEXT: ret void ; store float %1, ptr %0, align 4 @@ -284,8 +284,8 @@ define void @tiny_vector_with_diff_opcode(ptr %a, ptr %v1) { ; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 undef to i16 ; CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> poison, i16 [[TMP1]], i32 0 ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[TMP2]], i32 1 -; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <8 x i16> [[TMP4]], <8 x i16> poison, <8 x i32> -; CHECK-NEXT: store <8 x i16> [[SHUFFLE]], ptr [[A:%.*]], align 16 +; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i16> [[TMP4]], <8 x i16> poison, <8 x i32> +; CHECK-NEXT: store <8 x i16> [[TMP5]], ptr [[A:%.*]], align 16 ; CHECK-NEXT: ret void ; %1 = load i16, ptr %v1, align 4