From: Zhe Wang Date: Tue, 26 Feb 2019 03:45:27 +0000 (+0800) Subject: audio: add kcontrol of EQ setting [1/2] X-Git-Tag: hardkernel-4.9.236-104~1649 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=ab04046551b096194700ce08bece56cf8628880e;p=platform%2Fkernel%2Flinux-amlogic.git audio: add kcontrol of EQ setting [1/2] PD#TV-1808,TV-1809,TV-1810,TV-1811 Problem: HW EQ on TL1 doesn't work Solution: Add kcontrol of EQ setting and getting Verify: test on X301 Change-Id: Iea1525b4a57241a99389c746c0238d96424df316 Signed-off-by: Zhe Wang --- diff --git a/MAINTAINERS b/MAINTAINERS index ce786b4..c166720 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13796,6 +13796,7 @@ F: arch/arm/boot/dts/amlogic> ANLOGIC AUDIO M: Xing Wang +M: Zhe Wang F: arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts F: arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts F: arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts diff --git a/arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts b/arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts index 50a4aac..c8ec735 100644 --- a/arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts +++ b/arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts @@ -1416,9 +1416,6 @@ &clkaudio CLKID_AUDIO_EQDRC>; clock-names = "gate", "srcpll", "eqdrc"; - eq_enable = <1>; - multiband_drc_enable = <0>; - fullband_drc_enable = <0>; /* * 0:tdmout_a * 1:tdmout_b @@ -1430,7 +1427,7 @@ /* max 0xf, each bit for one lane, usually one lane */ lane_mask = <0x1>; /* max 0xff, each bit for one channel */ - channel_mask = <0x3>; + channel_mask = <0xff>; status = "okay"; }; diff --git a/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts b/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts index d6bff98..e5d4560 100644 --- a/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts +++ b/arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts @@ -1477,9 +1477,6 @@ &clkaudio CLKID_AUDIO_EQDRC>; clock-names = "gate", "srcpll", "eqdrc"; - eq_enable = <1>; - multiband_drc_enable = <0>; - fullband_drc_enable = <0>; /* * 0:tdmout_a * 1:tdmout_b @@ -1491,7 +1488,7 @@ /* max 0xf, each bit for one lane, usually one lane */ lane_mask = <0x1>; /* max 0xff, each bit for one channel */ - channel_mask = <0x3>; + channel_mask = <0xff>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts b/arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts index 83b88ce..4fa1576 100644 --- a/arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts +++ b/arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts @@ -1414,9 +1414,6 @@ &clkaudio CLKID_AUDIO_EQDRC>; clock-names = "gate", "srcpll", "eqdrc"; - eq_enable = <1>; - multiband_drc_enable = <0>; - fullband_drc_enable = <0>; /* * 0:tdmout_a * 1:tdmout_b @@ -1428,7 +1425,7 @@ /* max 0xf, each bit for one lane, usually one lane */ lane_mask = <0x1>; /* max 0xff, each bit for one channel */ - channel_mask = <0x3>; + channel_mask = <0xff>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts b/arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts index 755e6a6..73ebc1c 100644 --- a/arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts +++ b/arch/arm64/boot/dts/amlogic/tl1_t962x2_x301.dts @@ -1471,9 +1471,6 @@ &clkaudio CLKID_AUDIO_EQDRC>; clock-names = "gate", "srcpll", "eqdrc"; - eq_enable = <1>; - multiband_drc_enable = <0>; - fullband_drc_enable = <0>; /* * 0:tdmout_a * 1:tdmout_b @@ -1485,7 +1482,7 @@ /* max 0xf, each bit for one lane, usually one lane */ lane_mask = <0x1>; /* max 0xff, each bit for one channel */ - channel_mask = <0x3>; + channel_mask = <0xff>; status = "okay"; }; diff --git a/sound/soc/amlogic/auge/ddr_mngr.c b/sound/soc/amlogic/auge/ddr_mngr.c index c787a7e..5c228603 100644 --- a/sound/soc/amlogic/auge/ddr_mngr.c +++ b/sound/soc/amlogic/auge/ddr_mngr.c @@ -1231,28 +1231,22 @@ void aml_frddr_set_format(struct frddr *fr, fr->type = frddr_type; } - static void aml_aed_enable(struct frddr_attach *p_attach_aed, bool enable) { struct frddr *fr = fetch_frddr_by_src(p_attach_aed->attach_module); - if (check_aed_v2()) { - if (fr->chipinfo - && fr->chipinfo->src_sel_ctrl) { - struct aml_audio_controller *actrl = fr->actrl; - unsigned int reg_base = fr->reg_base; - unsigned int reg; + struct aml_audio_controller *actrl = fr->actrl; + unsigned int reg_base = fr->reg_base; + unsigned int reg; - reg = calc_frddr_address(EE_AUDIO_FRDDR_A_CTRL2, - reg_base); - aml_audiobus_update_bits(actrl, - reg, 0x1 << 3, enable << 3); - } + reg = calc_frddr_address(EE_AUDIO_FRDDR_A_CTRL2, reg_base); + aml_audiobus_update_bits(actrl, + reg, 0x1 << 3, enable << 3); aed_set_ctrl(enable, 0, p_attach_aed->attach_module); - aed_set_format(fr->msb, fr->type); - aed_enable(enable, fr->dest, fr->fifo_id); + aed_set_format(fr->msb, fr->type, fr->fifo_id); + aed_enable(enable); } else { if (enable) { /* frddr type and bit depth for AED */ diff --git a/sound/soc/amlogic/auge/ddr_mngr.h b/sound/soc/amlogic/auge/ddr_mngr.h index 7f3131b..203c0b4 100644 --- a/sound/soc/amlogic/auge/ddr_mngr.h +++ b/sound/soc/amlogic/auge/ddr_mngr.h @@ -221,7 +221,7 @@ struct frddr { struct aml_audio_controller *actrl; unsigned int reg_base; - unsigned int fifo_id; + enum ddr_num fifo_id; unsigned int channels; unsigned int msb; diff --git a/sound/soc/amlogic/auge/effects_hw_v2.c b/sound/soc/amlogic/auge/effects_hw_v2.c index 6c1e1a6..e6b22ab 100644 --- a/sound/soc/amlogic/auge/effects_hw_v2.c +++ b/sound/soc/amlogic/auge/effects_hw_v2.c @@ -23,17 +23,31 @@ #include "tdm_hw.h" #include "spdif_hw.h" -void aed_set_ram_coeff(int len, int *params) +void aed_set_ram_coeff(int add, int len, unsigned int *params) { int i, ctrl_v; + unsigned int *p = params; - for (i = 0; i < len; i++) { - ctrl_v = (i << 2) | (0x1 << 1) | (0x1 << 0); - eqdrc_write(AED_COEF_RAM_DATA, params[i]); + for (i = 0; i < len; i++, p++) { + ctrl_v = ((add+i) << 2) | (0x1 << 1) | (0x1 << 0); + eqdrc_write(AED_COEF_RAM_DATA, *p); eqdrc_write(AED_COEF_RAM_CNTL, ctrl_v); } } +void aed_get_ram_coeff(int add, int len, unsigned int *params) +{ + int i, ctrl_v; + unsigned int *p = params; + + for (i = 0; i < len; i++, p++) { + ctrl_v = ((add+i) << 2) | (0x0 << 1) | (0x1 << 0); + eqdrc_write(AED_COEF_RAM_CNTL, ctrl_v); + *p = eqdrc_read(AED_COEF_RAM_DATA); + //pr_info("%s, params[%d] = %8.8x\n", __func__, i, *p); + } +} + void aed_set_multiband_drc_coeff(int len, int *params) { int band_len = len / 3, i, j; @@ -90,7 +104,7 @@ void aed_set_fullband_drc_coeff(int len, int *params) eqdrc_write(AED_DRC_LOOPBACK_CNTL, (144 << 0)); } -static void aed_set_mixer_params(void) +void aed_set_mixer_params(void) { eqdrc_write(AED_MIX0_LL, 0x40000); eqdrc_write(AED_MIX0_RL, 0x0); @@ -129,7 +143,16 @@ void aed_nd_enable(bool enable) void aed_eq_enable(int idx, bool enable) { eqdrc_update_bits(AED_EQ_EN, 0x1 << idx, enable << idx); - eqdrc_update_bits(AED_EQ_TAP_CNTL, 0x1f << (5 * idx), 10 << (5 * idx)); +} + +void aed_eq_taps(unsigned int eq1_taps) +{ + if (eq1_taps > 20) { + pr_err("Error EQ1_Tap = %d\n", eq1_taps); + return; + } + eqdrc_update_bits(AED_EQ_TAP_CNTL, 0x1f, eq1_taps); + eqdrc_update_bits(AED_EQ_TAP_CNTL, 0x1f << 5, (20 - eq1_taps) << 5); } void aed_multiband_drc_enable(bool enable) @@ -150,7 +173,7 @@ void aed_fullband_drc_enable(bool enable) ); } -void aed_set_EQ_volume( +void aed_set_volume( unsigned int master_vol, unsigned int Lch_vol, unsigned int Rch_vol) @@ -161,18 +184,30 @@ void aed_set_EQ_volume( (Rch_vol << 8) | /* channel 2 volume: 0dB */ (Lch_vol << 0) /* channel 1 volume: 0dB */ ); - eqdrc_write(AED_EQ_VOLUME_SLEW_CNT, 0x40); + eqdrc_write(AED_EQ_VOLUME_SLEW_CNT, 0x200); /*10ms*/ eqdrc_write(AED_MUTE, 0); } void aed_set_lane_and_channels(int lane_mask, int ch_mask) { + int ch_num = 0, i = 0; + int val = ch_mask & 0xff; + eqdrc_update_bits(AED_TOP_CTL, 0xff << 18 | 0xf << 14, ch_mask << 18 | lane_mask << 14); + + for (i = 0; i < 8; i++) { + if ((val & 0x1) == 0x1) + ch_num++; + val >>= 1; + } + + eqdrc_update_bits(AED_TOP_REQ_CTL, + 0xff << 12, (ch_num - 1) << 12); } -void aed_set_ctrl(bool enable, int sel, int module) +void aed_set_ctrl(bool enable, int sel, enum frddr_dest module) { int mask = 0, val = 0; @@ -194,28 +229,28 @@ void aed_set_ctrl(bool enable, int sel, int module) sel, module); return; } + eqdrc_update_bits(AED_TOP_REQ_CTL, mask, val); /* Effect Module */ - if (module >= 3) { - /* SPDIFOUT A/B */ - aml_spdifout_select_aed(enable, module - 3); - } else if (module < 3 && module >= 0) { + if (module <= TDMOUT_C && module >= TDMOUT_A) { /* TDMOUT A/B/C */ aml_tdmout_select_aed(enable, module); - } else - pr_err("unknown module:%d for AED\n", module); + } else { + /* SPDIFOUT A/B */ + aml_spdifout_select_aed(enable, module - SPDIFOUT_A); + } } -void aed_set_format(int msb, int frddr_type) +void aed_set_format(int msb, enum ddr_types frddr_type, enum ddr_num source) { eqdrc_update_bits(AED_TOP_CTL, - 0x7 << 11 | 0x1f << 6, - frddr_type << 11 | msb << 6); + 0x7 << 11 | 0x1f << 6 | 0x3 << 4, + frddr_type << 11 | msb << 6 | source << 4); } -void aed_enable(bool enable, int frddr_dst, int fifo_id) +void aed_enable(bool enable) { if (enable) { eqdrc_write(AED_ED_CNTL, 0x1); @@ -223,8 +258,6 @@ void aed_enable(bool enable, int frddr_dst, int fifo_id) eqdrc_update_bits(AED_TOP_CTL, 0x1 << 1, 0x1 << 1); eqdrc_update_bits(AED_TOP_CTL, 0x1 << 2, 0x1 << 2); - - aed_set_mixer_params(); } else eqdrc_update_bits(AED_TOP_CTL, 0x3 << 1, 0x0 << 1); @@ -234,3 +267,4 @@ void aed_enable(bool enable, int frddr_dst, int fifo_id) if (enable) eqdrc_update_bits(AED_TOP_CTL, 0x1 << 31, 0x1 << 31); } + diff --git a/sound/soc/amlogic/auge/effects_hw_v2.h b/sound/soc/amlogic/auge/effects_hw_v2.h index 7c13e7f..f99e3b6 100644 --- a/sound/soc/amlogic/auge/effects_hw_v2.h +++ b/sound/soc/amlogic/auge/effects_hw_v2.h @@ -17,8 +17,10 @@ #ifndef __EFFECTS_HW_V2_H__ #define __EFFECTS_HW_V2_H__ #include +#include "ddr_mngr.h" -void aed_set_ram_coeff(int len, int *params); +void aed_set_ram_coeff(int add, int len, unsigned int *params); +void aed_get_ram_coeff(int add, int len, unsigned int *params); void aed_set_multiband_drc_coeff(int len, int *params); void aed_set_fullband_drc_coeff(int len, int *params); void aed_dc_enable(bool enable); @@ -26,12 +28,15 @@ void aed_nd_enable(bool enable); void aed_eq_enable(int idx, bool enable); void aed_multiband_drc_enable(bool enable); void aed_fullband_drc_enable(bool enable); -void aed_set_EQ_volume( +void aed_set_volume( unsigned int master_volume, unsigned int Lch_vol, unsigned int Rch_vol); void aed_set_lane_and_channels(int lane_mask, int ch_mask); -void aed_set_ctrl(bool enable, int sel, int module); -void aed_set_format(int msb, int frddr_type); -void aed_enable(bool enable, int frddr_dst, int fifo_id); +void aed_set_ctrl(bool enable, int sel, enum frddr_dest module); +void aed_set_format(int msb, enum ddr_types frddr_type, enum ddr_num source); +void aed_enable(bool enable); +void aed_set_mixer_params(void); +void aed_eq_taps(unsigned int eq1_taps); + #endif diff --git a/sound/soc/amlogic/auge/effects_hw_v2_coeff.c b/sound/soc/amlogic/auge/effects_hw_v2_coeff.c deleted file mode 100644 index 903883f..0000000 --- a/sound/soc/amlogic/auge/effects_hw_v2_coeff.c +++ /dev/null @@ -1,298 +0,0 @@ -/* - * sound/soc/amlogic/auge/effects_hw_v2_coeff.c - * - * Copyright (C) 2018 Amlogic, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - */ - -#define AED_EQ_LENGTH 225 -#define AED_MULTIBAND_DRC_LENGTH 18 -#define AED_FULLBAND_DRC_LENGTH 24 - -static int eq_coeff[] = { - /* 0 */ 0x7fd51b, - /* 1 */ 0x30055c9, - /* 2 */ 0x7fd51b, - /* 3 */ 0x30055e6, - /* 4 */ 0x7faa53, - /* 5 */ 0x7ed219, - /* 6 */ 0x3025bce, - /* 7 */ 0x7ed219, - /* 8 */ 0x3025e96, - /* 9 */ 0x7da6fb, - /* 10 */ 0x7ed219, - /* 11 */ 0x3025bce, - /* 12 */ 0x7ed219, - /* 13 */ 0x3025e96, - /* 14 */ 0x7da6fb, - /* 15 */ 0xdf71e0, - /* 16 */ 0x2411c40, - /* 17 */ 0xdf71e0, - /* 18 */ 0x304bd12, - /* 19 */ 0x7b58fb, - /* 20 */ 0x7d8252, - /* 21 */ 0x30bb7df, - /* 22 */ 0x771ba1, - /* 23 */ 0x30bb7df, - /* 24 */ 0x749df4, - /* 25 */ 0x79f87b, - /* 26 */ 0x31971e4, - /* 27 */ 0x6ddabe, - /* 28 */ 0x31971e4, - /* 29 */ 0x67d339, - /* 30 */ 0x84f8f3, - /* 31 */ 0x31d2c91, - /* 32 */ 0x62ebbf, - /* 33 */ 0x31d2c91, - /* 34 */ 0x67e4b1, - /* 35 */ 0x711f0e, - /* 36 */ 0x3543f10, - /* 37 */ 0x4ae2f0, - /* 38 */ 0x3543f10, - /* 39 */ 0x3c01ff, - /* 40 */ 0xaaf457, - /* 41 */ 0x3831bd5, - /* 42 */ 0xfb150, - /* 43 */ 0x3831bd5, - /* 44 */ 0x3aa5a8, - /* 45 */ 0x65b5d1, - /* 46 */ 0xe3390, - /* 47 */ 0x2226c8, - /* 48 */ 0xe3390, - /* 49 */ 0x7dc99, - /* 50 */ 0x358660, - /* 51 */ 0x6b0cc1, - /* 52 */ 0x358660, - /* 53 */ 0x3b418e, - /* 54 */ 0x1ad7f4, - /* 55 */ 0x800000, - /* 56 */ 0x0, - /* 57 */ 0x0, - /* 58 */ 0x0, - /* 59 */ 0x0, - /* 60 */ 0x800000, - /* 61 */ 0x0, - /* 62 */ 0x0, - /* 63 */ 0x0, - /* 64 */ 0x0, - /* 65 */ 0x800000, - /* 66 */ 0x0, - /* 67 */ 0x0, - /* 68 */ 0x0, - /* 69 */ 0x0, - /* 70 */ 0x800000, - /* 71 */ 0x0, - /* 72 */ 0x0, - /* 73 */ 0x0, - /* 74 */ 0x0, - /* 75 */ 0x800000, - /* 76 */ 0x0, - /* 77 */ 0x0, - /* 78 */ 0x0, - /* 79 */ 0x0, - /* 80 */ 0x800000, - /* 81 */ 0x0, - /* 82 */ 0x0, - /* 83 */ 0x0, - /* 84 */ 0x0, - /* 85 */ 0x800000, - /* 86 */ 0x0, - /* 87 */ 0x0, - /* 88 */ 0x0, - /* 89 */ 0x0, - /* 90 */ 0x800000, - /* 91 */ 0x0, - /* 92 */ 0x0, - /* 93 */ 0x0, - /* 94 */ 0x0, - /* 95 */ 0x800000, - /* 96 */ 0x0, - /* 97 */ 0x0, - /* 98 */ 0x0, - /* 99 */ 0x0, - /* 100 */ 0x800000, - /* 101 */ 0x0, - /* 102 */ 0x0, - /* 103 */ 0x0, - /* 104 */ 0x0, - /* 105 */ 0x7ed219, - /* 106 */ 0x3025bce, - /* 107 */ 0x7ed219, - /* 108 */ 0x3025e96, - /* 109 */ 0x7da6fb, - /* 110 */ 0x7ed219, - /* 111 */ 0x3025bce, - /* 112 */ 0x7ed219, - /* 113 */ 0x3025e96, - /* 114 */ 0x7da6fb, - /* 115 */ 0xdf71e0, - /* 116 */ 0x2411c40, - /* 117 */ 0xdf71e0, - /* 118 */ 0x304bd12, - /* 119 */ 0x7b58fb, - /* 120 */ 0x7d8252, - /* 121 */ 0x30bb7df, - /* 122 */ 0x771ba1, - /* 123 */ 0x30bb7df, - /* 124 */ 0x749df4, - /* 125 */ 0x79f87b, - /* 126 */ 0x31971e4, - /* 127 */ 0x6ddabe, - /* 128 */ 0x31971e4, - /* 129 */ 0x67d339, - /* 130 */ 0x84f8f3, - /* 131 */ 0x31d2c91, - /* 132 */ 0x62ebbf, - /* 133 */ 0x31d2c91, - /* 134 */ 0x67e4b1, - /* 135 */ 0x711f0e, - /* 136 */ 0x3543f10, - /* 137 */ 0x4ae2f0, - /* 138 */ 0x3543f10, - /* 139 */ 0x3c01ff, - /* 140 */ 0xaaf457, - /* 141 */ 0x3831bd5, - /* 142 */ 0xfb150, - /* 143 */ 0x3831bd5, - /* 144 */ 0x3aa5a8, - /* 145 */ 0x65b5d1, - /* 146 */ 0xe3390, - /* 147 */ 0x2226c8, - /* 148 */ 0xe3390, - /* 149 */ 0x7dc99, - /* 150 */ 0x358660, - /* 151 */ 0x6b0cc1, - /* 152 */ 0x358660, - /* 153 */ 0x3b418e, - /* 154 */ 0x1ad7f4, - /* 155 */ 0x800000, - /* 156 */ 0x0, - /* 157 */ 0x0, - /* 158 */ 0x0, - /* 159 */ 0x0, - /* 160 */ 0x800000, - /* 161 */ 0x0, - /* 162 */ 0x0, - /* 163 */ 0x0, - /* 164 */ 0x0, - /* 165 */ 0x800000, - /* 166 */ 0x0, - /* 167 */ 0x0, - /* 168 */ 0x0, - /* 169 */ 0x0, - /* 170 */ 0x800000, - /* 171 */ 0x0, - /* 172 */ 0x0, - /* 173 */ 0x0, - /* 174 */ 0x0, - /* 175 */ 0x800000, - /* 176 */ 0x0, - /* 177 */ 0x0, - /* 178 */ 0x0, - /* 179 */ 0x0, - /* 180 */ 0x800000, - /* 181 */ 0x0, - /* 182 */ 0x0, - /* 183 */ 0x0, - /* 184 */ 0x0, - /* 185 */ 0x800000, - /* 186 */ 0x0, - /* 187 */ 0x0, - /* 188 */ 0x0, - /* 189 */ 0x0, - /* 190 */ 0x800000, - /* 191 */ 0x0, - /* 192 */ 0x0, - /* 193 */ 0x0, - /* 194 */ 0x0, - /* 195 */ 0x800000, - /* 196 */ 0x0, - /* 197 */ 0x0, - /* 198 */ 0x0, - /* 199 */ 0x0, - /* 200 */ 0x800000, - /* 201 */ 0x0, - /* 202 */ 0x0, - /* 203 */ 0x0, - /* 204 */ 0x0, - /* 205 */ 0x25b, - /* 206 */ 0x4b5, - /* 207 */ 0x25b, - /* 208 */ 0x3045701, - /* 209 */ 0x7bb269, - /* 210 */ 0x7dd6da, - /* 211 */ 0x304524c, - /* 212 */ 0x7dd6da, - /* 213 */ 0x3045701, - /* 214 */ 0x7bb269, - /* 215 */ 0x7f3ee, - /* 216 */ 0xfe7dc, - /* 217 */ 0x7f3ee, - /* 218 */ 0x37f9f4a, - /* 219 */ 0x20306d, - /* 220 */ 0x482449, - /* 221 */ 0x36fb76e, - /* 222 */ 0x482449, - /* 223 */ 0x37f9f4a, - /* 224 */ 0x20306d, -}; - -static int multiband_drc_coeff[] = { - 0x34ebb, /* Low SMS coeff0 */ - 0x7f54e0, /* Low SMS coeff1 */ - 0x5188, /* Low RELEASE coeff0 */ - 0x7fae78, /* Low RELEASE coeff1 */ - 0x3263a, /* Low ATTACK coeff0 */ - 0x7cd9c6, /* Low ATTACK coeff1 */ - - 0x34ebb, /* Mid */ - 0x7f54e0, - 0x5188, - 0x7fae78, - 0x3263a, - 0x7cd9c6, - - 0x34ebb, /* High */ - 0x7f54e0, - 0x5188, - 0x7fae78, - 0x3263a, - 0x7cd9c6, -}; - -static int fullband_drc_coeff[] = { - 0x5188, /* RELEASE_COEF00 */ - 0x7fae78, /* RELEASE_COEF01 */ - 0x5188, - 0x7fae78, - 0x5188, - 0x7fae78, - 0x5188, - 0x7fae78, - 0x5188, - 0x7fae78, - 0x5188, /* RELEASE_COEF50 */ - 0x7fae78, /* RELEASE_COEF51 */ - 0x3263a, /* ATTACK_COEF00 */ - 0x7cd9c6, /* ATTACK_COEF01 */ - 0x3263a, - 0x7cd9c6, - 0x3263a, - 0x7cd9c6, - 0x3263a, - 0x7cd9c6, - 0x3263a, - 0x7cd9c6, - 0x3263a, /* ATTACK_COEF50 */ - 0x7cd9c6, /* ATTACK_COEF51 */ -}; diff --git a/sound/soc/amlogic/auge/effects_hw_v2_coeff.h b/sound/soc/amlogic/auge/effects_hw_v2_coeff.h new file mode 100644 index 0000000..02ee7e8 --- /dev/null +++ b/sound/soc/amlogic/auge/effects_hw_v2_coeff.h @@ -0,0 +1,147 @@ +/* + * sound/soc/amlogic/auge/effects_hw_v2_coeff.h + * + * Copyright (C) 2018 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#define EQ_BAND 20 +#define FILTER_PARAM_SIZE 5 +#define DC_CUT_FILTER_RAM_ADD 0 +#define DC_CUT_FILTER_SIZE FILTER_PARAM_SIZE +#define EQ_FILTER_RAM_ADD (DC_CUT_FILTER_RAM_ADD + FILTER_PARAM_SIZE) +#define EQ_FILTER_SIZE_CH (EQ_BAND*FILTER_PARAM_SIZE) +#define EQ_FILTER_SIZE (2*EQ_FILTER_SIZE_CH) +#define CROSSOVER_FILTER_RAM_ADD (EQ_FILTER_RAM_ADD + EQ_FILTER_SIZE) +#define CROSSOVER_FILTER_SIZE (4*FILTER_PARAM_SIZE) + +#define FILTER_PARAM_BYTE 66 /*"0x%8.8x "*/ + +static unsigned int DC_CUT_COEFF[DC_CUT_FILTER_SIZE] = { + 0x7fd51b, 0x30055c9, 0x7fd51b, 0x30055e6, 0x7b1673 +}; + +static unsigned int EQ_COEFF[EQ_FILTER_SIZE] = { + /*Ch1 EQ 0~19*/ + /*0~9 band*/ + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + /*10~19 band*/ + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + /*Ch2 EQ 0~19*/ + /*0~9 band*/ + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + /*10~19 band*/ + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, + 0x800000, 0x0, 0x0, 0x0, 0x0, +}; + +/*fiter1 fc: 120Hz; fiter2 fc: 4.5KHz*/ +static unsigned int CROSSOVER_COEFF[CROSSOVER_FILTER_SIZE] = { + /*low-pass filter1*/ + 0x25b, 0x4b5, 0x25b, 0x3045701, 0x7bb269, + /*high-pass filter1*/ + 0x7dd6da, 0x304524c, 0x7dd6da, 0x3045701, 0x7bb269, + /*low-pass filter2*/ + 0x7f3ee, 0xfe7dc, 0x7f3ee, 0x37f9f4a, 0x20306d, + /*high-pass filter2*/ + 0x482449, 0x36fb76e, 0x482449, 0x37f9f4a, 0x20306d, +}; + +#define AED_MULTIBAND_DRC_LENGTH 18 +#define AED_FULLBAND_DRC_LENGTH 24 + +static int multiband_drc_coeff[] = { + 0x34ebb, /* Low SMS coeff0 */ + 0x7f54e0, /* Low SMS coeff1 */ + 0x5188, /* Low RELEASE coeff0 */ + 0x7fae78, /* Low RELEASE coeff1 */ + 0x3263a, /* Low ATTACK coeff0 */ + 0x7cd9c6, /* Low ATTACK coeff1 */ + + 0x34ebb, /* Mid */ + 0x7f54e0, + 0x5188, + 0x7fae78, + 0x3263a, + 0x7cd9c6, + + 0x34ebb, /* High */ + 0x7f54e0, + 0x5188, + 0x7fae78, + 0x3263a, + 0x7cd9c6, +}; + +static int fullband_drc_coeff[] = { + 0x5188, /* RELEASE_COEF00 */ + 0x7fae78, /* RELEASE_COEF01 */ + 0x5188, + 0x7fae78, + 0x5188, + 0x7fae78, + 0x5188, + 0x7fae78, + 0x5188, + 0x7fae78, + 0x5188, /* RELEASE_COEF50 */ + 0x7fae78, /* RELEASE_COEF51 */ + 0x3263a, /* ATTACK_COEF00 */ + 0x7cd9c6, /* ATTACK_COEF01 */ + 0x3263a, + 0x7cd9c6, + 0x3263a, + 0x7cd9c6, + 0x3263a, + 0x7cd9c6, + 0x3263a, + 0x7cd9c6, + 0x3263a, /* ATTACK_COEF50 */ + 0x7cd9c6, /* ATTACK_COEF51 */ +}; + diff --git a/sound/soc/amlogic/auge/effects_v2.c b/sound/soc/amlogic/auge/effects_v2.c index 13e4184..695ca43 100644 --- a/sound/soc/amlogic/auge/effects_v2.c +++ b/sound/soc/amlogic/auge/effects_v2.c @@ -25,7 +25,7 @@ #include "effects_v2.h" #include "effects_hw_v2.h" -#include "effects_hw_v2_coeff.c" +#include "effects_hw_v2_coeff.h" #include "ddr_mngr.h" #include "regs.h" #include "iomap.h" @@ -175,29 +175,6 @@ static int mixer_aed_write(struct snd_kcontrol *kcontrol, return 0; } -static void check_set_aed_top( - struct audioeffect *p_effect, - int mask_new, bool enable) -{ - int mask_last = p_effect->mask_en; - bool update_aed_top = false; - - pr_info("%s, mask:0x%x\n", __func__, mask_new); - - if (enable) - p_effect->mask_en |= mask_new; - else - p_effect->mask_en &= ~mask_new; - - if (enable && (!mask_last) && p_effect->mask_en) - update_aed_top = true; /* to enable */ - else if ((!enable) && mask_last && (!p_effect->mask_en)) - update_aed_top = true; /* to disable */ - - if (update_aed_top) - aml_set_aed(enable, p_effect->effect_module); -} - static int mixer_aed_enable_DC(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { @@ -207,10 +184,6 @@ static int mixer_aed_enable_DC(struct snd_kcontrol *kcontrol, aed_dc_enable(p_effect->dc_en); - check_set_aed_top(p_effect, - 0x1 << AED_DC, - p_effect->dc_en); - return 0; } @@ -223,10 +196,6 @@ static int mixer_aed_enable_ND(struct snd_kcontrol *kcontrol, aed_nd_enable(p_effect->nd_en); - check_set_aed_top(p_effect, - 0x1 << AED_ND, - p_effect->nd_en); - return 0; } @@ -234,18 +203,11 @@ static int mixer_aed_enable_EQ(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct audioeffect *p_effect = snd_kcontrol_chip(kcontrol); - int *p_eq_coeff = eq_coeff; - int len = ARRAY_SIZE(eq_coeff); p_effect->eq_en = ucontrol->value.integer.value[0]; - aed_set_ram_coeff(len, p_eq_coeff); aed_eq_enable(0, p_effect->eq_en); - check_set_aed_top(p_effect, - 0x1 << AED_EQ, - p_effect->eq_en); - return 0; } @@ -264,10 +226,6 @@ static int mixer_aed_enable_multiband_DRC(struct snd_kcontrol *kcontrol, aed_set_multiband_drc_coeff(len, p_multiband_coeff); aed_multiband_drc_enable(p_effect->multiband_drc_en); - check_set_aed_top(p_effect, - 0x1 << AED_MDRC, - p_effect->multiband_drc_en); - return 0; } @@ -286,42 +244,93 @@ static int mixer_aed_enable_fullband_DRC(struct snd_kcontrol *kcontrol, aed_set_fullband_drc_coeff(len, p_fullband_coeff); aed_fullband_drc_enable(p_effect->fullband_drc_en); - check_set_aed_top(p_effect, - 0x1 << AED_FDRC, - p_effect->fullband_drc_en); - return 0; } static int mixer_get_EQ_params(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { - int *val = (int *)ucontrol->value.bytes.data; - int *p = &eq_coeff[0]; + unsigned int *value = (unsigned int *)ucontrol->value.bytes.data; + unsigned int *p = &EQ_COEFF[0]; + int i; + + aed_get_ram_coeff(EQ_FILTER_RAM_ADD, EQ_FILTER_SIZE_CH, p); - memcpy(val, p, AED_EQ_LENGTH); + for (i = 0; i < EQ_FILTER_SIZE_CH; i++) + *value++ = cpu_to_be32(*p++); return 0; } +static int str2int(char *str, unsigned int *data, int size) +{ + int num = 0; + unsigned int temp = 0; + char *ptr = str; + unsigned int *val = data; + + while (size-- != 0) { + if ((*ptr >= '0') && (*ptr <= '9')) { + temp = temp * 16 + (*ptr - '0'); + } else if ((*ptr >= 'a') && (*ptr <= 'f')) { + temp = temp * 16 + (*ptr - 'a' + 10); + } else if (*ptr == ' ') { + *(val+num) = temp; + temp = 0; + num++; + } + ptr++; + } + + return num; +} static int mixer_set_EQ_params(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { - struct soc_bytes_ext *params = (void *)kcontrol->private_value; + unsigned int tmp_data[FILTER_PARAM_SIZE + 1]; + unsigned int *p_data = &tmp_data[0]; + char tmp_string[FILTER_PARAM_BYTE]; + char *p_string = &tmp_string[0]; + unsigned int *p = &EQ_COEFF[0]; + int num, i, band_id; void *data; - int *val, *p = &eq_coeff[0]; + char *val; data = kmemdup(ucontrol->value.bytes.data, - params->max, GFP_KERNEL | GFP_DMA); + FILTER_PARAM_BYTE, GFP_KERNEL | GFP_DMA); if (!data) return -ENOMEM; - val = (int *)data; - memcpy(p, val, params->max / sizeof(int)); - + val = (char *)data; + memcpy(p_string, val, FILTER_PARAM_BYTE); kfree(data); + num = str2int(p_string, p_data, FILTER_PARAM_BYTE); + band_id = tmp_data[0]; + if (num != (FILTER_PARAM_SIZE + 1) || band_id >= EQ_BAND) { + pr_info("Error: parma_num = %d, band_id = %d\n", + num, tmp_data[0]); + return 0; + } + + p_data = &tmp_data[1]; + p = &EQ_COEFF[band_id*FILTER_PARAM_SIZE]; + for (i = 0; i < FILTER_PARAM_SIZE; i++, p++, p_data++) { + *p = *p_data; + *(p + EQ_FILTER_SIZE_CH) = *p_data; + } + + p = &EQ_COEFF[band_id*FILTER_PARAM_SIZE]; + aed_set_ram_coeff((EQ_FILTER_RAM_ADD + + band_id*FILTER_PARAM_SIZE), + FILTER_PARAM_SIZE, p); + + p = &EQ_COEFF[band_id*FILTER_PARAM_SIZE + EQ_FILTER_SIZE_CH]; + aed_set_ram_coeff((EQ_FILTER_RAM_ADD + + EQ_FILTER_SIZE_CH + band_id*FILTER_PARAM_SIZE), + FILTER_PARAM_SIZE, p); + return 0; } @@ -394,7 +403,6 @@ static const char *const aed_module_texts[] = { "TDMOUT_A", "TDMOUT_B", "TDMOUT_C", - "SPDIFIN", "SPDIFOUT_A", "SPDIFOUT_B", }; @@ -429,12 +437,7 @@ static int aed_module_set_enum( p_effect->effect_module = ucontrol->value.enumerated.item[0]; /* update info to ddr and modules */ - aed_set_ctrl( - p_effect->eq_en | - p_effect->multiband_drc_en | - p_effect->fullband_drc_en, - 0, - p_effect->effect_module); + aml_set_aed(1, p_effect->effect_module); return 0; } @@ -465,7 +468,7 @@ static const struct snd_kcontrol_new snd_effect_controls[] = { mixer_aed_read, mixer_aed_enable_fullband_DRC), SND_SOC_BYTES_EXT("AED EQ Parameters", - AED_EQ_LENGTH, + (EQ_FILTER_SIZE_CH * 4), mixer_get_EQ_params, mixer_set_EQ_params), @@ -484,14 +487,6 @@ static const struct snd_kcontrol_new snd_effect_controls[] = { aed_module_get_enum, aed_module_set_enum), - SOC_SINGLE_EXT("AED Lane mask", - AED_TOP_CTL, 14, 0xF, 0, - mixer_aed_read, mixer_aed_write), - - SOC_SINGLE_EXT("AED Channel mask", - AED_TOP_CTL, 18, 0xFF, 0, - mixer_aed_read, mixer_aed_write), - SOC_SINGLE_EXT_TLV("AED Lch volume", AED_EQ_VOLUME, 0, 0xFF, 1, mixer_aed_read, mixer_aed_write, @@ -558,6 +553,20 @@ static const struct of_device_id effect_device_id[] = { }; MODULE_DEVICE_TABLE(of, effect_device_id); +static void aed_set_filter_data(void) +{ + int *p; + + /* set default filter param*/ + p = &DC_CUT_COEFF[0]; + aed_set_ram_coeff(DC_CUT_FILTER_RAM_ADD, DC_CUT_FILTER_SIZE, p); + p = &EQ_COEFF[0]; + aed_set_ram_coeff(EQ_FILTER_RAM_ADD, EQ_FILTER_SIZE, p); + p = &CROSSOVER_COEFF[0]; + aed_set_ram_coeff(CROSSOVER_FILTER_RAM_ADD, CROSSOVER_FILTER_SIZE, p); + +} + static int effect_platform_probe(struct platform_device *pdev) { struct audioeffect *p_effect; @@ -567,7 +576,6 @@ static int effect_platform_probe(struct platform_device *pdev) bool multiband_drc_enable = false; bool fullband_drc_enable = false; int lane_mask = -1, channel_mask = -1, eqdrc_module = -1; - int ret; pr_info("%s, line:%d\n", __func__, __LINE__); @@ -619,16 +627,11 @@ static int effect_platform_probe(struct platform_device *pdev) return ret; } - eqdrc_clk_set(p_effect); - - eq_enable = of_property_read_bool(pdev->dev.of_node, - "eq_enable"); - - multiband_drc_enable = of_property_read_bool(pdev->dev.of_node, - "multiband_drc_enable"); - - fullband_drc_enable = of_property_read_bool(pdev->dev.of_node, - "fullband_drc_enable"); + ret = eqdrc_clk_set(p_effect); + if (ret < 0) { + dev_err(&pdev->dev, "set eq drc module clk fail!\n"); + return -EINVAL; + } ret = of_property_read_u32(pdev->dev.of_node, "eqdrc_module", @@ -654,11 +657,8 @@ static int effect_platform_probe(struct platform_device *pdev) return -EINVAL; } - pr_info("%s \t eq_en:%d, multi-band drc en:%d, full-band drc en:%d, module:%d, lane_mask:%d, ch_mask:%d\n", + pr_info("%s \t module:%d, lane_mask:%d, ch_mask:%d\n", __func__, - eq_enable, - multiband_drc_enable, - fullband_drc_enable, eqdrc_module, lane_mask, channel_mask @@ -672,8 +672,18 @@ static int effect_platform_probe(struct platform_device *pdev) p_effect->ch_mask = channel_mask; p_effect->effect_module = eqdrc_module; + /*set eq/drc module lane & channels*/ aed_set_lane_and_channels(lane_mask, channel_mask); - aed_set_EQ_volume(0xc0, 0x30, 0x30); + /*set master & channel volume gain to 0dB*/ + aed_set_volume(0xc0, 0x30, 0x30); + /*set default mixer gain*/ + aed_set_mixer_params(); + /*all 20 bands for EQ1*/ + aed_eq_taps(EQ_BAND); + /*set default filter param*/ + aed_set_filter_data(); + /*set EQ/DRC module enable*/ + aml_set_aed(1, p_effect->effect_module); p_effect->dev = dev; s_effect = p_effect; diff --git a/sound/soc/amlogic/auge/spdif_hw.c b/sound/soc/amlogic/auge/spdif_hw.c index 713edb6..29e0540 100644 --- a/sound/soc/amlogic/auge/spdif_hw.c +++ b/sound/soc/amlogic/auge/spdif_hw.c @@ -375,7 +375,7 @@ void aml_spdifout_select_aed(bool enable, int spdifout_id) /* select eq_drc output */ offset = EE_AUDIO_SPDIFOUT_B_CTRL1 - EE_AUDIO_SPDIFOUT_CTRL1; reg = EE_AUDIO_SPDIFOUT_CTRL1 + offset * spdifout_id; - audiobus_update_bits(reg, 0x1 << 21, enable << 21); + audiobus_update_bits(reg, 0x1 << 31, enable << 31); } void aml_spdifout_get_aed_info(int spdifout_id,