From: Guennadi Liakhovetski <lg@denx.de>
Date: Wed, 6 Aug 2008 19:42:07 +0000 (+0200)
Subject: nand_spl: Support page-aligned read in nand_load, use chipselect
X-Git-Tag: v2008.10-rc1~181^2~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=aa646643b6bc250cb3a4966bf728876e0c10d329;p=platform%2Fkernel%2Fu-boot.git

nand_spl: Support page-aligned read in nand_load, use chipselect

Supporting page-aligned reads doesn't incure any sinificant overhead, just
a small change in the algorithm. Also replace in_8 with readb, since there
is no in_8 on ARM.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---

diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index 81b4dfc..16d128f 100644
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -131,7 +131,7 @@ static int nand_is_bad_block(struct mtd_info *mtd, int block)
 	/*
 	 * Read one byte
 	 */
-	if (in_8(this->IO_ADDR_R) != 0xff)
+	if (readb(this->IO_ADDR_R) != 0xff)
 		return 1;
 
 	return 0;
@@ -184,29 +184,33 @@ static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
 	return 0;
 }
 
-static int nand_load(struct mtd_info *mtd, int offs, int uboot_size, uchar *dst)
+static int nand_load(struct mtd_info *mtd, unsigned int offs,
+                     unsigned int uboot_size, uchar *dst)
 {
-	int block;
-	int blockcopy_count;
-	int page;
+	unsigned int block, lastblock;
+	unsigned int page;
 
 	/*
-	 * offs has to be aligned to a block address!
+	 * offs has to be aligned to a page address!
 	 */
 	block = offs / CFG_NAND_BLOCK_SIZE;
-	blockcopy_count = 0;
+	lastblock = (offs + uboot_size - 1) / CFG_NAND_BLOCK_SIZE;
+	page = (offs % CFG_NAND_BLOCK_SIZE) / CFG_NAND_PAGE_SIZE;
 
-	while (blockcopy_count < (uboot_size / CFG_NAND_BLOCK_SIZE)) {
+	while (block <= lastblock) {
 		if (!nand_is_bad_block(mtd, block)) {
 			/*
 			 * Skip bad blocks
 			 */
-			for (page = 0; page < CFG_NAND_PAGE_COUNT; page++) {
+			while (page < CFG_NAND_PAGE_COUNT) {
 				nand_read_page(mtd, block, page, dst);
 				dst += CFG_NAND_PAGE_SIZE;
+				page++;
 			}
 
-			blockcopy_count++;
+			page = 0;
+		} else {
+			lastblock++;
 		}
 
 		block++;
@@ -235,12 +239,18 @@ void nand_boot(void)
 	nand_chip.dev_ready = NULL;	/* preset to NULL */
 	board_nand_init(&nand_chip);
 
+	if (nand_chip.select_chip)
+		nand_chip.select_chip(&nand_info, 0);
+
 	/*
 	 * Load U-Boot image from NAND into RAM
 	 */
 	ret = nand_load(&nand_info, CFG_NAND_U_BOOT_OFFS, CFG_NAND_U_BOOT_SIZE,
 			(uchar *)CFG_NAND_U_BOOT_DST);
 
+	if (nand_chip.select_chip)
+		nand_chip.select_chip(&nand_info, -1);
+
 	/*
 	 * Jump to U-Boot image
 	 */