From: Jerome Brunet <jbrunet@baylibre.com>
Date: Mon, 13 May 2019 12:31:15 +0000 (+0200)
Subject: clk: meson: g12a: add controller register init
X-Git-Tag: v5.15~5910^2~5^6^2~9
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a9f7b1993b709ffbbeeaeff232701639ca31ef95;p=platform%2Fkernel%2Flinux-starfive.git

clk: meson: g12a: add controller register init

Add the MPLL common register initial setting

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---

diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index eda4990..9df90ba 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -2992,10 +2992,16 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
 	&g12a_vdec_hevcf,
 };
 
+static const struct reg_sequence g12a_init_regs[] = {
+	{ .reg = HHI_MPLL_CNTL0,	.def = 0x00000543 },
+};
+
 static const struct meson_eeclkc_data g12a_clkc_data = {
 	.regmap_clks = g12a_clk_regmaps,
 	.regmap_clk_num = ARRAY_SIZE(g12a_clk_regmaps),
-	.hw_onecell_data = &g12a_hw_onecell_data
+	.hw_onecell_data = &g12a_hw_onecell_data,
+	.init_regs = g12a_init_regs,
+	.init_count = ARRAY_SIZE(g12a_init_regs),
 };
 
 static const struct of_device_id clkc_match_table[] = {