From: Jacob Baungard Hansen Date: Thu, 24 Nov 2016 08:53:28 +0000 (+0000) Subject: TableGen: Allow signed immediates for instruction aliases X-Git-Tag: llvmorg-4.0.0-rc1~3738 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a8cbbdc9b6bd2b845bfe0d3d677a1edf9f67b895;p=platform%2Fupstream%2Fllvm.git TableGen: Allow signed immediates for instruction aliases Patch by Daniel Cederman. Reviewers: stoklund, arsenm Subscribers: arsenm, llvm-commits Differential Revision: https://reviews.llvm.org/D27046 llvm-svn: 287856 --- diff --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp b/llvm/utils/TableGen/AsmWriterEmitter.cpp index 5061568..70cea1f 100644 --- a/llvm/utils/TableGen/AsmWriterEmitter.cpp +++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp @@ -879,7 +879,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { IAP.addCond(Op + ".isImm()"); Cond = Op + ".getImm() == " + - llvm::utostr(CGA.ResultOperands[i].getImm()); + llvm::itostr(CGA.ResultOperands[i].getImm()); IAP.addCond(Cond); break; }