From: Alex Bee <knaerzche@gmail.com>
Date: Mon, 27 Nov 2023 18:46:44 +0000 (+0100)
Subject: ARM: dts: rockchip: Fix sdmmc_pwren's pinmux setting for RK3128
X-Git-Tag: v6.6.7~148
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a7fb9f15fedce217ee6f8921f726d335b7a16037;p=platform%2Fkernel%2Flinux-starfive.git

ARM: dts: rockchip: Fix sdmmc_pwren's pinmux setting for RK3128

[ Upstream commit 0c349b5001f8bdcead844484c15a0c4dfb341157 ]

RK3128's reference design uses sdmmc_pwren pincontrol as GPIO - see [0].

Let's change it in the SoC DT as well.

[0] https://github.com/rockchip-linux/kernel/commit/8c62deaf6025

Fixes: a0201bff6259 ("ARM: dts: rockchip: add rk3128 soc dtsi")
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20231127184643.13314-2-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---

diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index 88a4b0d..80d81af 100644
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -795,7 +795,7 @@
 			};
 
 			sdmmc_pwren: sdmmc-pwren {
-				rockchip,pins = <1 RK_PB6 1 &pcfg_pull_default>;
+				rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_default>;
 			};
 
 			sdmmc_bus4: sdmmc-bus4 {