From: Jason Ekstrand <jason.ekstrand@intel.com>
Date: Sun, 12 Nov 2017 06:03:45 +0000 (-0800)
Subject: anv/cmd_buffer: Advance the address when initializing clear colors
X-Git-Tag: upstream/18.1.0~3927
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a6cc361e5fd2450249847d5ee8093d26ed7ff545;p=platform%2Fupstream%2Fmesa.git

anv/cmd_buffer: Advance the address when initializing clear colors

Found by inspection

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Cc: mesa-stable@lists.freedesktop.org
---

diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index fbb5706..53d8d66 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -557,12 +557,13 @@ init_fast_clear_state_entry(struct anv_cmd_buffer *cmd_buffer,
    /* Other combinations of auxiliary buffers and platforms require specific
     * values in the clear value dword(s).
     */
+   struct anv_address addr =
+      get_fast_clear_state_address(cmd_buffer->device, image, aspect, level,
+                                   FAST_CLEAR_STATE_FIELD_CLEAR_COLOR);
    unsigned i = 0;
    for (; i < cmd_buffer->device->isl_dev.ss.clear_value_size; i += 4) {
       anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_DATA_IMM), sdi) {
-         sdi.Address =
-            get_fast_clear_state_address(cmd_buffer->device, image, aspect, level,
-                                         FAST_CLEAR_STATE_FIELD_CLEAR_COLOR);
+         sdi.Address = addr;
 
          if (GEN_GEN >= 9) {
             /* MCS buffers on SKL+ can only have 1/0 clear colors. */
@@ -586,6 +587,8 @@ init_fast_clear_state_entry(struct anv_cmd_buffer *cmd_buffer,
             sdi.ImmediateData = 0;
          }
       }
+
+      addr.offset += 4;
    }
 }