From: Hoegeun Kwon Date: Tue, 13 Jun 2023 10:40:25 +0000 (+0900) Subject: RISCV: config: Enable sifive flush config X-Git-Tag: accepted/tizen/unified/riscv/20230725.071352~26 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a677cea30640c546b9e3fce2d273cfcde809e72a;p=platform%2Fkernel%2Flinux-starfive.git RISCV: config: Enable sifive flush config Enable SIFIVE_CCACHE and SIFIVE_FLUSH configuration. Change-Id: I008c302e89896a0ea14f065365526e4b490b5af2 Signed-off-by: Hoegeun Kwon --- diff --git a/arch/riscv/configs/tizen_visionfive2_defconfig b/arch/riscv/configs/tizen_visionfive2_defconfig index 4f288ccac73a..a306381ecdf3 100644 --- a/arch/riscv/configs/tizen_visionfive2_defconfig +++ b/arch/riscv/configs/tizen_visionfive2_defconfig @@ -342,6 +342,8 @@ CONFIG_CLK_STARFIVE_JH7110_VOUT=y CONFIG_RPMSG_CHAR=y CONFIG_RPMSG_CTRL=y CONFIG_RPMSG_VIRTIO=y +CONFIG_SIFIVE_CCACHE=y +CONFIG_SIFIVE_FLUSH=y CONFIG_PWM=y CONFIG_PWM_STARFIVE_PTC=y CONFIG_PHY_STARFIVE_DPHY_RX=y