From: Zack Rusin Date: Wed, 19 Dec 2007 18:22:27 +0000 (-0500) Subject: consts X-Git-Tag: 062012170305~17580^2~390^2~3083 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=a65f39f918f3a28c3c4e38036099d4ce97fcfac7;p=profile%2Fivi%2Fmesa.git consts --- diff --git a/src/mesa/pipe/i965simple/brw_curbe.c b/src/mesa/pipe/i965simple/brw_curbe.c index 66a04b9..1bdd870 100644 --- a/src/mesa/pipe/i965simple/brw_curbe.c +++ b/src/mesa/pipe/i965simple/brw_curbe.c @@ -37,6 +37,7 @@ #include "brw_util.h" #include "brw_wm.h" #include "pipe/p_state.h" +#include "pipe/p_winsys.h" #include "pipe/p_util.h" #define FILE_DEBUG_FLAG DEBUG_FALLBACKS @@ -246,13 +247,16 @@ static void upload_constant_buffer(struct brw_context *brw) if (brw->curbe.vs_size) { -// unsigned offset = brw->curbe.vs_start * 16; -// unsigned nr = vp->max_const; - + unsigned offset = brw->curbe.vs_start * 16; + /*unsigned nr = vp->max_const;*/ + const struct pipe_constant_buffer *cbuffer = brw->attribs.Constants[0]; + struct pipe_winsys *ws = brw->pipe.winsys; /* map the vertex constant buffer and copy to curbe: */ - -// assert(nr == 0); - assert(0); + ws->buffer_map(ws, cbuffer->buffer, 0); + ws->buffer_get_subdata(ws, cbuffer->buffer, + 0, cbuffer->size, + &buf[offset]); + ws->buffer_unmap(ws, cbuffer->buffer); } if (0) { diff --git a/src/mesa/pipe/i965simple/brw_vs_emit.c b/src/mesa/pipe/i965simple/brw_vs_emit.c index d8483f2..d70df15 100644 --- a/src/mesa/pipe/i965simple/brw_vs_emit.c +++ b/src/mesa/pipe/i965simple/brw_vs_emit.c @@ -38,6 +38,7 @@ struct brw_prog_info { unsigned num_temps; unsigned num_addrs; + unsigned num_consts; unsigned writes_psize; @@ -74,13 +75,11 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c, /* Vertex program parameters from curbe: */ -#if 0 - nr_params = c->vp->program.num_inputs; /*FIXME: i think this is wrong... */ + nr_params = c->prog_data.max_const; for (i = 0; i < nr_params; i++) { - c->regs[TGSI_FILE_INPUT][i] = stride(brw_vec4_grf(reg+i/2, (i%2) * 4), 0, 4, 1); + c->regs[TGSI_FILE_CONSTANT][i] = stride(brw_vec4_grf(reg+i/2, (i%2) * 4), 0, 4, 1); } reg += (nr_params+1)/2; -#endif c->prog_data.curb_read_length = reg - 1; @@ -986,6 +985,13 @@ static void process_declaration(const struct tgsi_full_declaration *decl, { switch(decl->Declaration.File) { case TGSI_FILE_CONSTANT: { + if (decl->Declaration.Declare == TGSI_DECLARE_MASK) { + printf("DECLARATION MASK = %d\n", + decl->u.DeclarationMask.Mask); + assert(0); + } else { /*range*/ + info->num_consts += decl->u.DeclarationRange.Last - decl->u.DeclarationRange.First + 1; + } } break; case TGSI_FILE_INPUT: { @@ -1300,12 +1306,12 @@ void brw_vs_emit(struct brw_vs_compile *c) /* first instruction (declerations finished). * now that we know what vars are being used allocate * registers for them.*/ + c->prog_data.max_const = prog_info.num_consts; brw_vs_alloc_regs(c, &prog_info); brw_set_access_mode(p, BRW_ALIGN_1); brw_MOV(p, get_addr_reg(stack_index), brw_address(c->stack)); brw_set_access_mode(p, BRW_ALIGN_16); - allocated_registers = 1; } process_instruction(c, inst, &prog_info); @@ -1318,4 +1324,5 @@ void brw_vs_emit(struct brw_vs_compile *c) emit_vertex_write(c, &prog_info); post_vs_emit(c, end_inst); tgsi_parse_free(&parse); + } diff --git a/src/mesa/pipe/xlib/xm_winsys_aub.c b/src/mesa/pipe/xlib/xm_winsys_aub.c index 60ba233..2d27648 100644 --- a/src/mesa/pipe/xlib/xm_winsys_aub.c +++ b/src/mesa/pipe/xlib/xm_winsys_aub.c @@ -259,7 +259,7 @@ static int aub_buffer_get_subdata(struct pipe_winsys *winsys, void *data) { struct aub_buffer *sbo = aub_bo(buf); - assert(sbo->size > offset + size); + assert(sbo->size >= offset + size); memcpy(data, sbo->data + offset, size); return 0; }